From mboxrd@z Thu Jan 1 00:00:00 1970 From: Albert ARIBAUD Date: Sun, 1 Feb 2015 03:38:42 +0100 Subject: [U-Boot] [PATCH 2/3] arm: relocation: clear .bss section with arch memset if defined In-Reply-To: <1422449743-10119-3-git-send-email-p.marczak@samsung.com> References: <1422449743-10119-1-git-send-email-p.marczak@samsung.com> <1422449743-10119-3-git-send-email-p.marczak@samsung.com> Message-ID: <20150201033842.130a86ac@lilith> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello Przemyslaw, On Wed, 28 Jan 2015 13:55:42 +0100, Przemyslaw Marczak wrote: > For ARM architecture, enable the CONFIG_USE_ARCH_MEMSET/MEMCPY, > will highly increase the memset/memcpy performance. This is able > thanks to the ARM multiple register instructions. > > Unfortunatelly the relocation is done without the cache enabled, > so it takes some time, but zeroing the BSS memory takes much more > longer, especially for the configs with big static buffers. > > A quick test confirms, that the boot time improvement after using > the arch memcpy for relocation has no significant meaning. > The same test confirms that enable the memset for zeroing BSS, > reduces the boot time. > > So this patch enables the arch memset for zeroing the BSS after > the relocation process. For ARM boards, this can be enabled > in board configs by defining: 'CONFIG_USE_ARCH_MEMSET'. Since the issue is that zeroing is done one word at a time, could we not simply clear r3 as well as r2 (possibly even r4 and r5 too) and do a double (possibly quadruple) write loop? That would avoid calling a libc routine from the almost sole file in U-Boot where a C environment is not necessarily granted. Amicalement, -- Albert.