From mboxrd@z Thu Jan 1 00:00:00 1970 From: Siarhei Siamashka Date: Fri, 20 Feb 2015 10:15:10 +0200 Subject: [U-Boot] [PATCH] sunxi: Fix sun5i mbus speed when booting old kernels In-Reply-To: <1424354356-29523-1-git-send-email-hdegoede@redhat.com> References: <1424354356-29523-1-git-send-email-hdegoede@redhat.com> Message-ID: <20150220101510.664a2c5c@i7> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thu, 19 Feb 2015 14:59:16 +0100 Hans de Goede wrote: > Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz, > halving the mbus frequency, so set it to 300 MHz ourselves and base the > mbus divider on that. > > Signed-off-by: Hans de Goede > --- > arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h > index d297ed0..c28ee05 100644 > --- a/arch/arm/include/asm/arch-sunxi/clock_sun4i.h > +++ b/arch/arm/include/asm/arch-sunxi/clock_sun4i.h > @@ -144,7 +144,16 @@ struct sunxi_ccm_reg { > > #define PLL1_CFG_DEFAULT 0xa1005000 > > +#if defined CONFIG_OLD_SUNXI_KERNEL_COMPAT && defined CONFIG_MACH_SUN5I > +/* > + * Older linux-sunxi-3.4 kernels override our PLL6 setting with 300 MHz, > + * halving the mbus frequency, so set it to 300 MHz ourselves and base the > + * mbus divider on that. > + */ > +#define PLL6_CFG_DEFAULT 0xa1009900 > +#else > #define PLL6_CFG_DEFAULT 0xa1009911 > +#endif > > /* nand clock */ > #define NAND_CLK_SRC_OSC24 0 Are there any good reasons to use 600MHz instead of 300MHz for PLL6 in the default u-boot build? Maybe PLL6 can be just set to 300MHz for sun5i in all cases, regardless of the CONFIG_OLD_SUNXI_KERNEL_COMPAT define? -- Best regards, Siarhei Siamashka