[U-Boot] [PATCH V2 1/2] spi: Add Designware SPI controller Kconfig entry

[U-Boot] [PATCH V2 1/2] spi: Add Designware SPI controller Kconfig entry

[Marek Vasut]

Add DWC SPI controller Kconfig entry.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
---
 drivers/spi/Kconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

V2: Improve the help text.

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 7ae2727..0f1d740 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -10,3 +10,11 @@ config DM_SPI
 	  as 'parent data' to every slave on each bus. Slaves
 	  typically use driver-private data instead of extending the
 	  spi_slave structure.
+
+config DESIGNWARE_SPI
+	bool "Designware SPI driver"
+	depends on DM_SPI
+	help
+	  Enable the Designware SPI driver. This driver can be used to
+	  access the SPI NOR flash on platforms embedding this Designware
+	  IP core.
-- 
2.1.3

[U-Boot] [PATCH V2 2/2] spi: Add Cadence QSPI controller Kconfig entry

[Marek Vasut]

Add Cadence QSPI controller Kconfig entry.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
---
 drivers/spi/Kconfig | 8 ++++++++
 1 file changed, 8 insertions(+)

V2: Improve the help text.

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 0f1d740..5a415be 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -18,3 +18,11 @@ config DESIGNWARE_SPI
 	  Enable the Designware SPI driver. This driver can be used to
 	  access the SPI NOR flash on platforms embedding this Designware
 	  IP core.
+
+config CADENCE_QSPI
+	bool "Cadence QSPI driver"
+	depends on DM_SPI
+	help
+	  Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
+	  used to access the SPI NOR flash on platforms embedding this
+	  Cadence IP core.
-- 
2.1.3

[U-Boot] [PATCH V2 2/2] spi: Add Cadence QSPI controller Kconfig entry

[Simon Glass]

On 5 March 2015 at 13:51, Marek Vasut <marex@denx.de> wrote:
> Add Cadence QSPI controller Kconfig entry.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@opensource.altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Tom Rini <trini@konsulko.com>
> Cc: Vince Bridgers <vbridger@opensource.altera.com>
> ---
>  drivers/spi/Kconfig | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> V2: Improve the help text.
>
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index 0f1d740..5a415be 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -18,3 +18,11 @@ config DESIGNWARE_SPI
>           Enable the Designware SPI driver. This driver can be used to
>           access the SPI NOR flash on platforms embedding this Designware
>           IP core.
> +
> +config CADENCE_QSPI
> +       bool "Cadence QSPI driver"
> +       depends on DM_SPI
> +       help
> +         Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
> +         used to access the SPI NOR flash on platforms embedding this
> +         Cadence IP core.
> --
> 2.1.3
>

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH V2 2/2] spi: Add Cadence QSPI controller Kconfig entry

[Marek Vasut]

On Thursday, March 05, 2015 at 10:46:08 PM, Simon Glass wrote:

Thanks.

> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> > index 0f1d740..5a415be 100644
> > --- a/drivers/spi/Kconfig
> > +++ b/drivers/spi/Kconfig
> > @@ -18,3 +18,11 @@ config DESIGNWARE_SPI
> > 
> >           Enable the Designware SPI driver. This driver can be used to
> >           access the SPI NOR flash on platforms embedding this Designware
> >           IP core.
> > 
> > +
> > +config CADENCE_QSPI
> > +       bool "Cadence QSPI driver"
> > +       depends on DM_SPI
> > +       help
> > +         Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
> > +         used to access the SPI NOR flash on platforms embedding this
> > +         Cadence IP core.
> > --
> > 2.1.3
> 
> Acked-by: Simon Glass <sjg@chromium.org>

Jagan seems to be busy with his marriage, so ... how do we handle these two
patches ? Do you want them in for this MW or the next one (either way is fine
by me) ? Also, I can push them through the socfpga tree, even though they should
probably go through -spi tree.

Best regards,
Marek Vasut

[U-Boot] [PATCH V2 2/2] spi: Add Cadence QSPI controller Kconfig entry

[Simon Glass]

Hi Marek,

On 5 March 2015 at 14:51, Marek Vasut <marex@denx.de> wrote:
> On Thursday, March 05, 2015 at 10:46:08 PM, Simon Glass wrote:
>
> Thanks.
>
>> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
>> > index 0f1d740..5a415be 100644
>> > --- a/drivers/spi/Kconfig
>> > +++ b/drivers/spi/Kconfig
>> > @@ -18,3 +18,11 @@ config DESIGNWARE_SPI
>> >
>> >           Enable the Designware SPI driver. This driver can be used to
>> >           access the SPI NOR flash on platforms embedding this Designware
>> >           IP core.
>> >
>> > +
>> > +config CADENCE_QSPI
>> > +       bool "Cadence QSPI driver"
>> > +       depends on DM_SPI
>> > +       help
>> > +         Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
>> > +         used to access the SPI NOR flash on platforms embedding this
>> > +         Cadence IP core.
>> > --
>> > 2.1.3
>>
>> Acked-by: Simon Glass <sjg@chromium.org>
>
> Jagan seems to be busy with his marriage, so ... how do we handle these two
> patches ? Do you want them in for this MW or the next one (either way is fine
> by me) ? Also, I can push them through the socfpga tree, even though they should
> probably go through -spi tree.

How about you pick them up?

Regards,
Simon

[U-Boot] [PATCH V2 2/2] spi: Add Cadence QSPI controller Kconfig entry

[Marek Vasut]

On Thursday, March 05, 2015 at 10:53:06 PM, Simon Glass wrote:
> Hi Marek,

Hi!

> On 5 March 2015 at 14:51, Marek Vasut <marex@denx.de> wrote:
> > On Thursday, March 05, 2015 at 10:46:08 PM, Simon Glass wrote:
> > 
> > Thanks.
> > 
> >> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> >> > index 0f1d740..5a415be 100644
> >> > --- a/drivers/spi/Kconfig
> >> > +++ b/drivers/spi/Kconfig
> >> > @@ -18,3 +18,11 @@ config DESIGNWARE_SPI
> >> > 
> >> >           Enable the Designware SPI driver. This driver can be used to
> >> >           access the SPI NOR flash on platforms embedding this
> >> >           Designware IP core.
> >> > 
> >> > +
> >> > +config CADENCE_QSPI
> >> > +       bool "Cadence QSPI driver"
> >> > +       depends on DM_SPI
> >> > +       help
> >> > +         Enable the Cadence Quad-SPI (QSPI) driver. This driver can
> >> > be +         used to access the SPI NOR flash on platforms embedding
> >> > this +         Cadence IP core.
> >> > --
> >> > 2.1.3
> >> 
> >> Acked-by: Simon Glass <sjg@chromium.org>
> > 
> > Jagan seems to be busy with his marriage, so ... how do we handle these
> > two patches ? Do you want them in for this MW or the next one (either
> > way is fine by me) ? Also, I can push them through the socfpga tree,
> > even though they should probably go through -spi tree.
> 
> How about you pick them up?

Uh sorry, I completely lost this email. I just replied to Jagan, so let's see
how the discussion there goes.

Best regards,
Marek Vasut

[U-Boot] [PATCH V2 2/2] spi: Add Cadence QSPI controller Kconfig entry

[Jagan Teki]

On 30 March 2015 at 19:23, Marek Vasut <marex@denx.de> wrote:
> On Thursday, March 05, 2015 at 10:53:06 PM, Simon Glass wrote:
>> Hi Marek,
>
> Hi!
>
>> On 5 March 2015 at 14:51, Marek Vasut <marex@denx.de> wrote:
>> > On Thursday, March 05, 2015 at 10:46:08 PM, Simon Glass wrote:
>> >
>> > Thanks.
>> >
>> >> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
>> >> > index 0f1d740..5a415be 100644
>> >> > --- a/drivers/spi/Kconfig
>> >> > +++ b/drivers/spi/Kconfig
>> >> > @@ -18,3 +18,11 @@ config DESIGNWARE_SPI
>> >> >
>> >> >           Enable the Designware SPI driver. This driver can be used to
>> >> >           access the SPI NOR flash on platforms embedding this
>> >> >           Designware IP core.
>> >> >
>> >> > +
>> >> > +config CADENCE_QSPI
>> >> > +       bool "Cadence QSPI driver"
>> >> > +       depends on DM_SPI
>> >> > +       help
>> >> > +         Enable the Cadence Quad-SPI (QSPI) driver. This driver can
>> >> > be +         used to access the SPI NOR flash on platforms embedding
>> >> > this +         Cadence IP core.
>> >> > --
>> >> > 2.1.3
>> >>
>> >> Acked-by: Simon Glass <sjg@chromium.org>
>> >
>> > Jagan seems to be busy with his marriage, so ... how do we handle these
>> > two patches ? Do you want them in for this MW or the next one (either
>> > way is fine by me) ? Also, I can push them through the socfpga tree,
>> > even though they should probably go through -spi tree.
>>
>> How about you pick them up?
>
> Uh sorry, I completely lost this email. I just replied to Jagan, so let's see
> how the discussion there goes.

I'm sending -spi PR now, if you want I shall take otherwise you just take care.

thanks!
-- 
Jagan.

[U-Boot] [PATCH V2 2/2] spi: Add Cadence QSPI controller Kconfig entry

[Marek Vasut]

On Monday, March 30, 2015 at 04:07:40 PM, Jagan Teki wrote:
> On 30 March 2015 at 19:23, Marek Vasut <marex@denx.de> wrote:
> > On Thursday, March 05, 2015 at 10:53:06 PM, Simon Glass wrote:
> >> Hi Marek,
> > 
> > Hi!
> > 
> >> On 5 March 2015 at 14:51, Marek Vasut <marex@denx.de> wrote:
> >> > On Thursday, March 05, 2015 at 10:46:08 PM, Simon Glass wrote:
> >> > 
> >> > Thanks.
> >> > 
> >> >> > diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> >> >> > index 0f1d740..5a415be 100644
> >> >> > --- a/drivers/spi/Kconfig
> >> >> > +++ b/drivers/spi/Kconfig
> >> >> > @@ -18,3 +18,11 @@ config DESIGNWARE_SPI
> >> >> > 
> >> >> >           Enable the Designware SPI driver. This driver can be used
> >> >> >           to access the SPI NOR flash on platforms embedding this
> >> >> >           Designware IP core.
> >> >> > 
> >> >> > +
> >> >> > +config CADENCE_QSPI
> >> >> > +       bool "Cadence QSPI driver"
> >> >> > +       depends on DM_SPI
> >> >> > +       help
> >> >> > +         Enable the Cadence Quad-SPI (QSPI) driver. This driver
> >> >> > can be +         used to access the SPI NOR flash on platforms
> >> >> > embedding this +         Cadence IP core.
> >> >> > --
> >> >> > 2.1.3
> >> >> 
> >> >> Acked-by: Simon Glass <sjg@chromium.org>
> >> > 
> >> > Jagan seems to be busy with his marriage, so ... how do we handle
> >> > these two patches ? Do you want them in for this MW or the next one
> >> > (either way is fine by me) ? Also, I can push them through the
> >> > socfpga tree, even though they should probably go through -spi tree.
> >> 
> >> How about you pick them up?
> > 
> > Uh sorry, I completely lost this email. I just replied to Jagan, so let's
> > see how the discussion there goes.
> 
> I'm sending -spi PR now, if you want I shall take otherwise you just take
> care.

Fine, I'll send these two for 2015.07 .

Best regards,
Marek Vasut

[U-Boot] [PATCH V2 2/2] spi: Add Cadence QSPI controller Kconfig entry

[Stefan Roese]

On 05.03.2015 21:51, Marek Vasut wrote:
> Add Cadence QSPI controller Kconfig entry.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@opensource.altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Tom Rini <trini@konsulko.com>
> Cc: Vince Bridgers <vbridger@opensource.altera.com>

Acked-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

[U-Boot] [PATCH V2 2/2] spi: Add Cadence QSPI controller Kconfig entry

[Jagan Teki]

On 6 March 2015 at 12:22, Stefan Roese <sr@denx.de> wrote:
> On 05.03.2015 21:51, Marek Vasut wrote:
>>
>> Add Cadence QSPI controller Kconfig entry.
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
>> Cc: Chin Liang See <clsee@opensource.altera.com>
>> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
>> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
>> Cc: Pavel Machek <pavel@denx.de>
>> Cc: Simon Glass <sjg@chromium.org>
>> Cc: Stefan Roese <sr@denx.de>
>> Cc: Tom Rini <trini@konsulko.com>
>> Cc: Vince Bridgers <vbridger@opensource.altera.com>
>
>
> Acked-by: Stefan Roese <sr@denx.de>

Shall I pick these two on my tree (-spi)?

thanks!
-- 
Jagan.

[U-Boot] [PATCH V2 2/2] spi: Add Cadence QSPI controller Kconfig entry

[Marek Vasut]

On Monday, March 30, 2015 at 02:16:05 PM, Jagan Teki wrote:
> On 6 March 2015 at 12:22, Stefan Roese <sr@denx.de> wrote:
> > On 05.03.2015 21:51, Marek Vasut wrote:
> >> Add Cadence QSPI controller Kconfig entry.
> >> 
> >> Signed-off-by: Marek Vasut <marex@denx.de>
> >> Cc: Chin Liang See <clsee@opensource.altera.com>
> >> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> >> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
> >> Cc: Pavel Machek <pavel@denx.de>
> >> Cc: Simon Glass <sjg@chromium.org>
> >> Cc: Stefan Roese <sr@denx.de>
> >> Cc: Tom Rini <trini@konsulko.com>
> >> Cc: Vince Bridgers <vbridger@opensource.altera.com>
> > 
> > Acked-by: Stefan Roese <sr@denx.de>
> 
> Shall I pick these two on my tree (-spi)?

Either that or I can send PR via SoCFPGA tree. Either way is OK.
The patches are now sitting in u-boot-socfpga/topic/spi-kconfig
so I can just send that out ...

Best regards,
Marek Vasut

[U-Boot] [PATCH V2 1/2] spi: Add Designware SPI controller Kconfig entry

[Simon Glass]

On 5 March 2015 at 13:51, Marek Vasut <marex@denx.de> wrote:
> Add DWC SPI controller Kconfig entry.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@opensource.altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Tom Rini <trini@konsulko.com>
> Cc: Vince Bridgers <vbridger@opensource.altera.com>
> ---
>  drivers/spi/Kconfig | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> V2: Improve the help text.
>
> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
> index 7ae2727..0f1d740 100644
> --- a/drivers/spi/Kconfig
> +++ b/drivers/spi/Kconfig
> @@ -10,3 +10,11 @@ config DM_SPI
>           as 'parent data' to every slave on each bus. Slaves
>           typically use driver-private data instead of extending the
>           spi_slave structure.
> +
> +config DESIGNWARE_SPI
> +       bool "Designware SPI driver"
> +       depends on DM_SPI
> +       help
> +         Enable the Designware SPI driver. This driver can be used to
> +         access the SPI NOR flash on platforms embedding this Designware
> +         IP core.
> --
> 2.1.3
>

Acked-by: Simon Glass <sjg@chromium.org>

[U-Boot] [PATCH V2 1/2] spi: Add Designware SPI controller Kconfig entry

[Stefan Roese]

On 05.03.2015 21:51, Marek Vasut wrote:
> Add DWC SPI controller Kconfig entry.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@opensource.altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
> Cc: Pavel Machek <pavel@denx.de>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Tom Rini <trini@konsulko.com>
> Cc: Vince Bridgers <vbridger@opensource.altera.com>

Acked-by: Stefan Roese <sr@denx.de>

Thanks,
Stefan

[U-Boot] [PATCH V2 1/2] spi: Add Designware SPI controller Kconfig entry

[Pavel Machek]

On Thu 2015-03-05 21:51:53, Marek Vasut wrote:
> Add DWC SPI controller Kconfig entry.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Chin Liang See <clsee@opensource.altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Acked-by: Pavel Machek <pavel@denx.de>
(for both patches).

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html