From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark Rutland Date: Mon, 30 Mar 2015 10:39:36 +0100 Subject: [U-Boot] [RFC PATCH] ARM: Merge v7 and v8 outer cache operations In-Reply-To: <20150327151148.05ce2a2b@lilith> References: <1422673734-25144-1-git-send-email-fenghua@phytium.com.cn> <20150212155652.GI1522@leverpostej> <20150327151148.05ce2a2b@lilith> Message-ID: <20150330093936.GC17971@leverpostej> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Fri, Mar 27, 2015 at 02:11:48PM +0000, Albert ARIBAUD wrote: > Hello Mark, > > On Thu, 12 Feb 2015 15:56:52 +0000, Mark Rutland > wrote: > > On Sat, Jan 31, 2015 at 03:08:54AM +0000, fenghua at phytium.com.cn wrote: > > > From: David Feng > > > > > > Armv7 and Armv8 allow outer cache exist, it is outside of the architecture > > > defined cache hierarchy and can not be manipulated by architecture defined > > > instructions. It's processor specific. > > > This patch merge v7_outer_cache_* and v8 l3_cache_*. > > > > This commit message is a little misleading, though it probably makes > > sense to have something of this sort ARMv8. Info dump below. [...] > So, does the commit message require rewriting? Yup. My complaint was that outer caches _can_ be manipulated by architecturally defined instructions, but only for maintenance by VA. So it's wrong to say that they cannot be manipulated by archtiecturally defined instructions. Mark.