From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pavel Machek Date: Tue, 31 Mar 2015 23:13:54 +0200 Subject: [U-Boot] [PATCHv3 17/17] arm: socfpga: fix uart0 pin mux configuration In-Reply-To: <551B0A9F.6080003@gmail.com> References: <1427752878-18426-1-git-send-email-dinguyen@opensource.altera.com> <1427752878-18426-18-git-send-email-dinguyen@opensource.altera.com> <20150331204809.GB9785@amd> <551B0A9F.6080003@gmail.com> Message-ID: <20150331211354.GG9785@amd> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Tue 2015-03-31 15:59:11, Dinh Nguyen wrote: > > > On 3/31/15 3:48 PM, Pavel Machek wrote: > > On Mon 2015-03-30 17:01:18, dinguyen at opensource.altera.com wrote: > >> From: Dinh Nguyen > >> > >> commit "07d30b6c3129 arm: socfpga: Sync Cyclone V DK pinmux configuration" > >> incorrectly set the muxing for UART0 on the Cyclone V DK. > >> > >> This fixes it up so UART0 is working again. > >> > >> Signed-off-by: Dinh Nguyen > > > > Acked-by: Pavel Machek > > > > But I guess this one should be merged ahead of the rest of series...? > > > Yes, this patch should get merged without the SPL. I suggest to send it separately, or make it part 1/ of the series. Thanks, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html