[U-Boot] [PATCHv3 04/17] arm: socfpga: spl: enable sdram, timer and uart

dinguyen at opensource.altera.com
2015-03-30T22:01:05Z

From: Dinh Nguyen <dinguyen@opensource.altera.com>

Add the calls in the spl_board_init to enable SDRAM, timer, and UART.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Marek Vasut <marex@denx.de>
---
arch/arm/cpu/armv7/socfpga/spl.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/arch/arm/cpu/armv7/socfpga/spl.c b/arch/arm/cpu/armv7/socfpga/spl.c
index 6a8c15d..a4dbe4f 100644
--- a/arch/arm/cpu/armv7/socfpga/spl.c
+++ b/arch/arm/cpu/armv7/socfpga/spl.c
@@ -144,6 +144,10 @@ void spl_board_init(void)
/* freeze all IO banks */
sys_mgr_frzctrl_freeze_req();

+ socfpga_sdram_enable();
+ socfpga_uart0_enable();
+ socfpga_osc1timer_enable();
+
debug("Reconfigure Clock Manager\n");
/* reconfigure the PLLs */
cm_basic_init(&cm_default_cfg);
--
2.2.1