From: Pavel Machek <pavel@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [RFC PATCH 4/4 v3] mtd: sf: Add CONFIG_SPI_N25Q256A_RESET for software-reset
Date: Sat, 25 Apr 2015 21:44:51 +0200 [thread overview]
Message-ID: <20150425194451.GB18496@amd> (raw)
In-Reply-To: <201410012025.55937.marex@denx.de>
On Wed 2014-10-01 20:25:55, Marek Vasut wrote:
> On Wednesday, October 01, 2014 at 05:13:11 PM, Stefan Roese wrote:
> > This is needed for the SoCFPGA booting from SPI NOR flash
> > e.g. (N25Q256A). With these changes, the SoCrates can boot and
> > re-boot (reset) from SPI NOR flash without any problems.
>
> Seems like your SPI NOR reset logic is buggy. Does any of [1] apply to your
> board please?
Actually, this has nothing to do with SPI NOR reset logic.
Yes, we need to reset NOR flash during u-boot startup, because
hardware was already initialized to 4-byte addressing by
u-boot-spl. No matter what reset logic does, if it passes u-boot-spl
(and SPI NOR is actually used), it will be in 4-byte mode.
And no, mainline u-boot-spl is not usable on socfpga, and probably will
not be usable for a whill, so u-boot-spl from altera is only option
here.
So.. what to do?
Do you want this patch? Do you want patch that know how to switch back
to 3-byte addressing on this particular flash?
Best regards,
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
next prev parent reply other threads:[~2015-04-25 19:44 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-01 15:13 [U-Boot] [PATCH 0/2 v3] arm: socfpga: Add Cadence QSPI support Stefan Roese
2014-10-01 15:13 ` [U-Boot] [PATCH 1/4 v3] spi: Add Cadence QSPI driver used by SoCFPGA Stefan Roese
2014-10-01 15:13 ` [U-Boot] [PATCH 2/4 v3] arm: socfpga: Add Cadence QSPI support to config header Stefan Roese
2014-10-01 15:13 ` [U-Boot] [PATCH 3/4 v3] arm: socfpga: Don't define CONFIG_SPI_FLASH_QUAD Stefan Roese
2014-10-01 15:13 ` [U-Boot] [RFC PATCH 4/4 v3] mtd: sf: Add CONFIG_SPI_N25Q256A_RESET for software-reset Stefan Roese
2014-10-01 18:25 ` Marek Vasut
2014-10-01 18:57 ` Stefan Roese
2014-10-01 19:04 ` Jagan Teki
2014-10-01 19:25 ` Stefan Roese
2014-10-01 23:07 ` Pavel Machek
2014-10-02 6:13 ` Stefan Roese
2014-10-02 2:47 ` Marek Vasut
2014-10-02 8:40 ` Pavel Machek
2014-10-02 11:23 ` Marek Vasut
2015-04-25 19:48 ` Pavel Machek
2015-04-27 16:35 ` Marek Vasut
2015-05-01 9:01 ` [U-Boot] [PATCH] " Pavel Machek
2015-05-01 14:24 ` Marek Vasut
2015-05-01 14:49 ` Pavel Machek
2015-05-01 17:26 ` Marek Vasut
2015-05-10 9:07 ` Pavel Machek
2015-05-10 9:15 ` [U-Boot] [PATCHv2] " Pavel Machek
2015-05-10 9:48 ` Marek Vasut
2015-05-10 10:49 ` [U-Boot] [PATCHv3] " Pavel Machek
2015-05-10 12:24 ` Jagan Teki
2015-05-10 16:25 ` Marek Vasut
2015-05-10 17:43 ` Pavel Machek
2015-05-11 7:47 ` Marek Vasut
2015-05-10 17:53 ` Pavel Machek
2015-05-11 7:48 ` Marek Vasut
2015-05-11 8:05 ` Jagan Teki
2015-05-11 8:29 ` Pavel Machek
2015-05-11 8:33 ` Jagan Teki
2015-05-11 8:39 ` Pavel Machek
2015-05-11 8:44 ` Jagan Teki
2015-05-11 8:50 ` Pavel Machek
2015-05-11 9:05 ` Jagan Teki
2015-05-11 9:56 ` Pavel Machek
2015-05-11 10:03 ` Jagan Teki
2015-05-15 8:47 ` Pavel Machek
2015-05-15 9:36 ` Marek Vasut
2015-05-15 9:55 ` Pavel Machek
2015-05-10 9:48 ` [U-Boot] [PATCH] " Marek Vasut
2015-04-25 19:44 ` Pavel Machek [this message]
2014-10-01 18:43 ` [U-Boot] [RFC PATCH 4/4 v3] " Jagan Teki
2014-10-03 20:58 ` [U-Boot] [PATCH 0/2 v3] arm: socfpga: Add Cadence QSPI support Marek Vasut
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