From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv3] mtd: sf: Add CONFIG_SPI_N25Q256A_RESET for software-reset
Date: Mon, 11 May 2015 09:47:49 +0200 [thread overview]
Message-ID: <201505110947.49181.marex@denx.de> (raw)
In-Reply-To: <20150510174352.GA28291@amd>
On Sunday, May 10, 2015 at 07:43:52 PM, Pavel Machek wrote:
> On Sun 2015-05-10 18:25:59, Marek Vasut wrote:
> > On Sunday, May 10, 2015 at 02:24:01 PM, Jagan Teki wrote:
> > > On 10 May 2015 at 16:19, Pavel Machek <pavel@denx.de> wrote:
> > > > On Sun 2015-05-10 11:15:41, Pavel Machek wrote:
> > > > Add reset for N25Q256A SPI NOR, as U-Boot SPL 2013-socfpga (only
> > > > version working on that board) sets 4-byte addressing mode.
> > > >
> > > > Signed-off-by: Pavel Machek <pavel@denx.de>
> >
> > So, I took one more look into the datasheet [1]. With this chip, which
> > is 128Mbit (16MByte), you don't even use 4-byte addressing so you don't
> > care about it at all.
> >
> > But you actually do care about it if your hardware is broken and you use
> > the N25Q256A [2] part. If the problem really is just between the
> > U-Boot
>
> No, I actually care whenever I use the U-boot SPL 2013, which is the
> only option today. And I explained it to you already. (Additionally,
> hardware might be broken. That has nothing to do with _this_ problem).
OK
> > SPL and U-Boot (which I doubt btw), you can probably augment U-Boot such
> > that it reads FSR (Flag Status Register, see page 27, table 17, bit 0).
> > This bit tells you whether the part is in 3-byte or 4-byte mode and you
> > can read this register in either mode.
>
> How does reading Micron-specific register help with code being too
> Micron-specific is unclear to me.
Just add a micron-specific hook and check the register on Micron parts
only. This would eliminate the need for new CONFIG_foo_bar option, which
is always a plus.
Best regards,
Marek Vasut
next prev parent reply other threads:[~2015-05-11 7:47 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-01 15:13 [U-Boot] [PATCH 0/2 v3] arm: socfpga: Add Cadence QSPI support Stefan Roese
2014-10-01 15:13 ` [U-Boot] [PATCH 1/4 v3] spi: Add Cadence QSPI driver used by SoCFPGA Stefan Roese
2014-10-01 15:13 ` [U-Boot] [PATCH 2/4 v3] arm: socfpga: Add Cadence QSPI support to config header Stefan Roese
2014-10-01 15:13 ` [U-Boot] [PATCH 3/4 v3] arm: socfpga: Don't define CONFIG_SPI_FLASH_QUAD Stefan Roese
2014-10-01 15:13 ` [U-Boot] [RFC PATCH 4/4 v3] mtd: sf: Add CONFIG_SPI_N25Q256A_RESET for software-reset Stefan Roese
2014-10-01 18:25 ` Marek Vasut
2014-10-01 18:57 ` Stefan Roese
2014-10-01 19:04 ` Jagan Teki
2014-10-01 19:25 ` Stefan Roese
2014-10-01 23:07 ` Pavel Machek
2014-10-02 6:13 ` Stefan Roese
2014-10-02 2:47 ` Marek Vasut
2014-10-02 8:40 ` Pavel Machek
2014-10-02 11:23 ` Marek Vasut
2015-04-25 19:48 ` Pavel Machek
2015-04-27 16:35 ` Marek Vasut
2015-05-01 9:01 ` [U-Boot] [PATCH] " Pavel Machek
2015-05-01 14:24 ` Marek Vasut
2015-05-01 14:49 ` Pavel Machek
2015-05-01 17:26 ` Marek Vasut
2015-05-10 9:07 ` Pavel Machek
2015-05-10 9:15 ` [U-Boot] [PATCHv2] " Pavel Machek
2015-05-10 9:48 ` Marek Vasut
2015-05-10 10:49 ` [U-Boot] [PATCHv3] " Pavel Machek
2015-05-10 12:24 ` Jagan Teki
2015-05-10 16:25 ` Marek Vasut
2015-05-10 17:43 ` Pavel Machek
2015-05-11 7:47 ` Marek Vasut [this message]
2015-05-10 17:53 ` Pavel Machek
2015-05-11 7:48 ` Marek Vasut
2015-05-11 8:05 ` Jagan Teki
2015-05-11 8:29 ` Pavel Machek
2015-05-11 8:33 ` Jagan Teki
2015-05-11 8:39 ` Pavel Machek
2015-05-11 8:44 ` Jagan Teki
2015-05-11 8:50 ` Pavel Machek
2015-05-11 9:05 ` Jagan Teki
2015-05-11 9:56 ` Pavel Machek
2015-05-11 10:03 ` Jagan Teki
2015-05-15 8:47 ` Pavel Machek
2015-05-15 9:36 ` Marek Vasut
2015-05-15 9:55 ` Pavel Machek
2015-05-10 9:48 ` [U-Boot] [PATCH] " Marek Vasut
2015-04-25 19:44 ` [U-Boot] [RFC PATCH 4/4 v3] " Pavel Machek
2014-10-01 18:43 ` Jagan Teki
2014-10-03 20:58 ` [U-Boot] [PATCH 0/2 v3] arm: socfpga: Add Cadence QSPI support Marek Vasut
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