From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv3] mtd: sf: Add CONFIG_SPI_N25Q256A_RESET for software-reset
Date: Fri, 15 May 2015 11:36:11 +0200 [thread overview]
Message-ID: <201505151136.11205.marex@denx.de> (raw)
In-Reply-To: <20150515084746.GA26883@amd>
On Friday, May 15, 2015 at 10:47:46 AM, Pavel Machek wrote:
> > >> Seems like nothing much doing in micron side
> > >>
> > >> switch (JEDEC_MFR(info)) {
> > >> case CFI_MFR_ST: /* Micron, actually */
> > >>
> > >> /* Some Micron need WREN command; all will accept it
> > >> */ need_wren = true;
> > >
> > > Umm. Take a closer look.
> > >
> > > There's no break, so it continues below.
> >
> > Ohh.. So Linux works for you.. then is it?
>
> Well, yes, but this code patch is actually not tested in my case,
> because u-boot already resets it for Linux.
>
> Anyway, is this what you'd like to see?
Was my idea of checking in which mode the SPI NOR is first discarded ?
[...]
> @@ -233,6 +234,30 @@ static int spi_flash_validate_params(struct spi_slave
> *spi, u8 *idcode, flash->poll_cmd = CMD_FLAG_STATUS;
> #endif
>
> + if (params->flags & MICRON_RESET) {
> +#define CMD_RESET_ENABLE 0x66
> +#define CMD_RESET_MEMORY 0x99
> + int ret;
The indent here seems funny.
I think it'd be better to pull this reset procedure into a separate function.
> + /*
> + * This is needed for the SoCFPGA booting from SPI NOR flash
> + * e.g. (N25Q256A), as U-Boot SPL 2013-socfpga (only version
> + * working on that board) sets 4-byte addressing mode.
> + */
> + ret = spi_flash_cmd(spi, CMD_RESET_ENABLE, NULL, 0);
> + if (ret) {
> + printf("SF: Failed issue enable reset command\n");
> + return ret;
> + }
> +
> + ret = spi_flash_cmd(spi, CMD_RESET_MEMORY, NULL, 0);
> + if (ret) {
> + printf("SF: Failed issue reset command\n");
> + return ret;
> + }
> +
> + printf("SF: Device software reset\n");
> + }
Otherwise I think it's OK.
next prev parent reply other threads:[~2015-05-15 9:36 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-10-01 15:13 [U-Boot] [PATCH 0/2 v3] arm: socfpga: Add Cadence QSPI support Stefan Roese
2014-10-01 15:13 ` [U-Boot] [PATCH 1/4 v3] spi: Add Cadence QSPI driver used by SoCFPGA Stefan Roese
2014-10-01 15:13 ` [U-Boot] [PATCH 2/4 v3] arm: socfpga: Add Cadence QSPI support to config header Stefan Roese
2014-10-01 15:13 ` [U-Boot] [PATCH 3/4 v3] arm: socfpga: Don't define CONFIG_SPI_FLASH_QUAD Stefan Roese
2014-10-01 15:13 ` [U-Boot] [RFC PATCH 4/4 v3] mtd: sf: Add CONFIG_SPI_N25Q256A_RESET for software-reset Stefan Roese
2014-10-01 18:25 ` Marek Vasut
2014-10-01 18:57 ` Stefan Roese
2014-10-01 19:04 ` Jagan Teki
2014-10-01 19:25 ` Stefan Roese
2014-10-01 23:07 ` Pavel Machek
2014-10-02 6:13 ` Stefan Roese
2014-10-02 2:47 ` Marek Vasut
2014-10-02 8:40 ` Pavel Machek
2014-10-02 11:23 ` Marek Vasut
2015-04-25 19:48 ` Pavel Machek
2015-04-27 16:35 ` Marek Vasut
2015-05-01 9:01 ` [U-Boot] [PATCH] " Pavel Machek
2015-05-01 14:24 ` Marek Vasut
2015-05-01 14:49 ` Pavel Machek
2015-05-01 17:26 ` Marek Vasut
2015-05-10 9:07 ` Pavel Machek
2015-05-10 9:15 ` [U-Boot] [PATCHv2] " Pavel Machek
2015-05-10 9:48 ` Marek Vasut
2015-05-10 10:49 ` [U-Boot] [PATCHv3] " Pavel Machek
2015-05-10 12:24 ` Jagan Teki
2015-05-10 16:25 ` Marek Vasut
2015-05-10 17:43 ` Pavel Machek
2015-05-11 7:47 ` Marek Vasut
2015-05-10 17:53 ` Pavel Machek
2015-05-11 7:48 ` Marek Vasut
2015-05-11 8:05 ` Jagan Teki
2015-05-11 8:29 ` Pavel Machek
2015-05-11 8:33 ` Jagan Teki
2015-05-11 8:39 ` Pavel Machek
2015-05-11 8:44 ` Jagan Teki
2015-05-11 8:50 ` Pavel Machek
2015-05-11 9:05 ` Jagan Teki
2015-05-11 9:56 ` Pavel Machek
2015-05-11 10:03 ` Jagan Teki
2015-05-15 8:47 ` Pavel Machek
2015-05-15 9:36 ` Marek Vasut [this message]
2015-05-15 9:55 ` Pavel Machek
2015-05-10 9:48 ` [U-Boot] [PATCH] " Marek Vasut
2015-04-25 19:44 ` [U-Boot] [RFC PATCH 4/4 v3] " Pavel Machek
2014-10-01 18:43 ` Jagan Teki
2014-10-03 20:58 ` [U-Boot] [PATCH 0/2 v3] arm: socfpga: Add Cadence QSPI support Marek Vasut
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