From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv3 2/3] driver/ddr/altera/: Add the sdram calibration portion
Date: Fri, 22 May 2015 12:36:33 +0200 [thread overview]
Message-ID: <201505221236.33500.marex@denx.de> (raw)
In-Reply-To: <555ECF29.7090208@denx.de>
On Friday, May 22, 2015 at 08:39:37 AM, Stefan Roese wrote:
> On 22.05.2015 04:43, Dinh Nguyen wrote:
> > On 5/21/15 6:35 PM, Marek Vasut wrote:
> >> On Monday, May 18, 2015 at 09:36:48 PM, dinguyen at opensource.altera.com
wrote:
> >>> From: Dinh Nguyen <dinguyen@opensource.altera.com>
> >>>
> >>> This patch adds the DDR calibration portion of the Altera SDRAM driver.
> >>>
> >>> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> >>
> >> Hi,
> >>
> >> DTTO here. The code is still ugly, but I'm afraid it's not gonna get
> >> any better if we keep it out of tree. It'd bet on getting this improved
> >> in-tree and under scrutiny from users. What do you think ?
> >
> > I agree. I really have tried my best to clean it up as best as I can.
>
> Yes, thanks. Really appreciated. I know that especially these kind of
> DDR calibration code tend to be quite complex and "ugly". So I also vote
> for getting this applied now and perhaps improving it in-tree.
I second that, I cannot say I fathom how huge the task of cleaning this up is.
> For this patch series:
>
> Acked-by: Stefan Roese <sr@denx.de>
>
> Thanks,
> Stefan
Best regards,
Marek Vasut
next prev parent reply other threads:[~2015-05-22 10:36 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-18 19:36 [U-Boot] [PATCHv3 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA dinguyen at opensource.altera.com
2015-05-18 19:36 ` [U-Boot] [PATCHv3 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller dinguyen at opensource.altera.com
2015-05-21 23:33 ` Marek Vasut
2015-05-18 19:36 ` [U-Boot] [PATCHv3 2/3] driver/ddr/altera/: Add the sdram calibration portion dinguyen at opensource.altera.com
2015-05-21 23:35 ` Marek Vasut
2015-05-22 2:43 ` Dinh Nguyen
2015-05-22 6:39 ` Stefan Roese
2015-05-22 10:36 ` Marek Vasut [this message]
2015-05-25 12:37 ` Pavel Machek
2015-05-25 13:23 ` Wolfgang Denk
2015-05-28 15:41 ` Dinh Nguyen
2015-05-28 18:18 ` Marek Vasut
2015-05-29 15:24 ` Dinh Nguyen
2015-06-01 13:17 ` Marek Vasut
2015-05-28 15:49 ` Dinh Nguyen
2015-05-18 19:36 ` [U-Boot] [PATCHv3 3/3] arm: socfpga: enable the Altera SDRAM controller driver dinguyen at opensource.altera.com
2015-05-21 23:35 ` Marek Vasut
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