From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Wed, 3 Jun 2015 10:10:10 -0400 Subject: [U-Boot] [PATCH 0/7] ARM: DRA7: DDR3: Enable hw leveling In-Reply-To: <1433322807-22403-1-git-send-email-lokeshvutla@ti.com> References: <1433322807-22403-1-git-send-email-lokeshvutla@ti.com> Message-ID: <20150603141010.GL1728@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wed, Jun 03, 2015 at 02:43:20PM +0530, Lokesh Vutla wrote: > This series updates the DDR3 init sequence and adds support for > hw leveling for all DRA7 platforms. > > Tested memtest and reboot on DRA7-evm , DRA72-evm, BeagleBoard-x15 boards. For sanity sake, tested on omap5_uevm (but indeed, the code didn't change just a few related calling paths for that family). -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: