From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tom Rini Date: Wed, 3 Jun 2015 10:10:36 -0400 Subject: [U-Boot] [PATCH 6/7] ARM: DRA7: Update DDR IO configuration In-Reply-To: <1433322807-22403-7-git-send-email-lokeshvutla@ti.com> References: <1433322807-22403-1-git-send-email-lokeshvutla@ti.com> <1433322807-22403-7-git-send-email-lokeshvutla@ti.com> Message-ID: <20150603141036.GS1728@bill-the-cat> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wed, Jun 03, 2015 at 02:43:26PM +0530, Lokesh Vutla wrote: > DDRIO_2 and LPDDR2CH1_1 registers are not present > for DRA7. So not configuring these registers for DRA7xx > > Signed-off-by: Lokesh Vutla Reviewed-by: Tom Rini -- Tom -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 836 bytes Desc: Digital signature URL: