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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA
Date: Fri, 26 Jun 2015 18:43:13 +0200	[thread overview]
Message-ID: <201506261843.13180.marex@denx.de> (raw)
In-Reply-To: <1433303570-10004-1-git-send-email-dinguyen@opensource.altera.com>

On Wednesday, June 03, 2015 at 05:52:47 AM, dinguyen at opensource.altera.com 
wrote:
> From: Dinh Nguyen <dinguyen@opensource.altera.com>
> 
> Hi,
> 
> This is v4 of the patch series that adds the DDR controller driver for
> Altera's SoCFPGA platform.
> 
> v4:
> - Further cleanup by removing comments that do not apply for Cyclone5.
> - Removed more unused functions
> 
> Thanks,

I applied this to u-boot/master and tried building for socfpga_cyclone5,
this is what I'm getting after I fixed these patches to actually apply
to u-boot/master (there was a minor conflict in Makefile):

drivers/ddr/altera/sdram.c:11:35: fatal error: asm/arch/sdram_config.h: No such 
file or directory
 #include <asm/arch/sdram_config.h>
                                   ^
compilation terminated.
make[1]: *** [drivers/ddr/altera/sdram.o] Error 1
make[1]: *** Waiting for unfinished jobs....
drivers/ddr/altera/sequencer.c: In function 'sdr_get_addr':
drivers/ddr/altera/sequencer.c:108:32: error: 'SDR_CTRLGRP_ADDRESS' undeclared 
(first use in this function)
   addr = ((u32)base & 0xfff) | SDR_CTRLGRP_ADDRESS;
                                ^
drivers/ddr/altera/sequencer.c:108:32: note: each undeclared identifier is 
reported only once for each function it appears in
drivers/ddr/altera/sequencer.c: In function 'initialize_hps_phy':
drivers/ddr/altera/sequencer.c:3850:2: warning: implicit declaration of function 
'SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ACDELAYEN_SET' [-Wimplicit-function-declaration]
  reg |= SDR_CTRLGRP_PHYCTRL_PHYCTRL_0_ACDELAYEN_SET(2);

Am I missing something ?

Best regards,
Marek Vasut

  parent reply	other threads:[~2015-06-26 16:43 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-03  3:52 [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA dinguyen at opensource.altera.com
2015-06-03  3:52 ` [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller dinguyen at opensource.altera.com
2015-06-09 11:55   ` Pavel Machek
2015-06-09 12:58     ` Wolfgang Denk
2015-06-09 15:51     ` Dinh Nguyen
2015-06-22  9:38       ` Chin Liang See
2015-06-22 10:56         ` Pavel Machek
2015-06-03  3:52 ` [U-Boot] [PATCHv4 2/3] driver/ddr/altera: Add the sdram calibration portion dinguyen at opensource.altera.com
2015-06-09 12:21   ` Pavel Machek
2015-06-03  3:52 ` [U-Boot] [PATCHv4 3/3] arm: socfpga: enable the Altera SDRAM controller driver dinguyen at opensource.altera.com
2015-06-09 12:25   ` Pavel Machek
2015-06-26 16:43 ` Marek Vasut [this message]
2015-06-26 20:01   ` [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA Marek Vasut
2015-07-12 19:50     ` Marek Vasut
2015-07-17 19:58       ` Dinh Nguyen
2015-07-17 20:22         ` Marek Vasut
2015-07-18 23:51           ` Marek Vasut
2015-07-20 13:40           ` Dinh Nguyen
2015-07-20 18:36             ` Marek Vasut
2015-07-20 19:31               ` Dinh Nguyen
2015-07-20 19:40                 ` Marek Vasut
2015-07-21 22:46                   ` Dinh Nguyen
2015-07-22  3:24                     ` Marek Vasut
2015-07-23 18:29                       ` Dinh Nguyen
2015-07-24  3:57                         ` Marek Vasut
2015-07-22  8:27                   ` Dinh Nguyen
2015-07-22  9:00                     ` Marek Vasut
2015-07-22 12:57                       ` Dinh Nguyen
2015-07-22 13:01                         ` Marek Vasut
2015-07-23  4:03                           ` Dinh Nguyen

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