[U-Boot] arm: ls1021a: Ensure LS1021 ARM Generic Timer CompareValue Set 64-bit

Alexander Stein
2015-08-17T06:55:39Z

On Wednesday 15 July 2015 15:13:05, Alison Wang wrote:
> This patch addresses a problem mentioned recently on this mailing list:
> [1].
>
> In that posting a LS1021 based system was locking up at about 5 minutes
> after boot, but the problem was mysteriously related to the toolchain
> used for building u-boot. Debugging the problem reveals a stuck
> interrupt 29 on the GIC.
>
> It appears Freescale's LS1021 support in u-boot erroneously sets the
> 64-bit ARM generic PL1 physical time CompareValue register to all-ones
> with a 32-bit value. This causes the timer compare to fire 344 seconds
> after u-boot configures it. Depending on how fast u-boot gets the
> kernel booted, this amounts to about 5-minutes of Linux uptime before
> locking up.
>
> Apparently the bug is masked by some toolchains. Perhaps this is
> explained by default compiler options, word sizes, or binutils versions.
> At any rate this patch makes the manipulation explicitly 64-bit which
> alleviates the issue.

initcall_run_list is the function "hiding" or not "hiding" this problem when
calling timer_init. It is using r4 and r5 for it's loop variables. On gcc-4.8
and gcc-4.9 the usage of those two registers are switched. So a newer gcc uses
a slightly different register allocation. While this function is perfectly
fine, depending on the r4 register timer_init uses a different value for the
upper 32-bit of CNTP_CVAL resulting in the different behavior.
I've compared two u-boots objdumps showing and not showing this problem which
_only_ differ in those 2 register usages.

Best regards,
Alexander
--
Dipl.-Inf. Alexander Stein
SYS TEC electronic GmbH
alexander.stein at systec-electronic.com

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