From mboxrd@z Thu Jan 1 00:00:00 1970 From: Albert ARIBAUD Date: Thu, 16 Jul 2015 14:53:58 +0200 Subject: [U-Boot] [PATCH 2/4] nand: lpc32xx: add SLC NAND controller support In-Reply-To: <1437003228-14746-3-git-send-email-vz@mleia.com> References: <1437003228-14746-1-git-send-email-vz@mleia.com> <1437003228-14746-3-git-send-email-vz@mleia.com> Message-ID: <20150716145358.16abeb70@lilith> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello Vladimir, On Thu, 16 Jul 2015 02:33:46 +0300, Vladimir Zapolskiy wrote: > diff --git a/drivers/mtd/nand/lpc32xx_nand_slc.c b/drivers/mtd/nand/lpc32xx_nand_slc.c > new file mode 100644 > +int board_nand_init(struct nand_chip *lpc32xx_chip) > +{ > + lpc32xx_chip->IO_ADDR_R = &lpc32xx_nand_slc_registers->data; > + lpc32xx_chip->IO_ADDR_W = &lpc32xx_nand_slc_registers->data; Consistent with my comment re nand_simpl.c, I think that the two assignments above are incorrect since the data register may not provide general access to the NAND's I/O lines, and is not 8-bit accessible even though the NAND is 8-bit wide. If Scott give his go, though, disregard my comment. Amicalement, -- Albert.