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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA
Date: Wed, 22 Jul 2015 05:24:31 +0200	[thread overview]
Message-ID: <201507220524.31517.marex@denx.de> (raw)
In-Reply-To: <55AECBB7.4030204@opensource.altera.com>

On Wednesday, July 22, 2015 at 12:46:15 AM, Dinh Nguyen wrote:
> On 07/20/2015 02:40 PM, Marek Vasut wrote:
> > On Monday, July 20, 2015 at 09:31:39 PM, Dinh Nguyen wrote:
> > [...]
> > 
> >>>>> Hi,
> >>>>> 
> >>>>> yeah, I have some insane amount of cleanup patches and fixes already.
> >>>>> I will post them once I'm done. What I am sorely missing is the
> >>>>> UniPHY register interface documentation, it looks like that is not
> >>>>> public, so I don't exactly know if what sequencer.c does is really
> >>>>> correct. Sometimes I have serious doubts about that too . Can you
> >>>>> give me the documentation please ?
> >>>> 
> >>>> Have you seen this link[1]?
> >>> 
> >>> Yes, but that is by far not all of the registers used in the
> >>> sequencer.c, is it ?
> >> 
> >> Looks like it's in the entire emi.pdf file[1]. Please look at volume 3,
> >> or page 531 of 895. The section for the UniPHY.
> > 
> > I extracted all the possible addresses used in the sequencer while
> > cleaning it up, they're below. I cannot find these in any documentation.
> > I checked the EMI RM, sure, but there seems to be many more registers
> > all around the place than what are described in the EMI RM. Any ideas
> > please ? Maybe this is not even the UniPHY anymore ?

Hi!

> I'll try to get those questions answered for you shortly.

Thanks!

> BTW, I tested out our your branch, but I think I'm missing a step as
> where to put the SPL DTB?
> 
> 
> U-Boot SPL 2015.07-rc3-00100-ga2e2da6 (Jul 21 2015 - 17:15:54)
> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
> drivers/ddr/altera/sequencer.c: CALIBRATION PASSED
> drivers/ddr/altera/sequencer.c: Calibration complete
> Missing DTB
> ### ERROR ### Please RESET the board ###

Do:

make u-boot-with-spl-dtb.sfp

This will produce u-boot-with-spl-dtb.sfp, which you write directly to that
0xa2 socfpga boot partition. It includes U-Boot SPL, DTB and U-Boot. You will
also need to define CONFIG_SPL_MMC_SUPPORT in include/configs/socfpga_common.h
as I didn't solve how to configure this on per-board basis, do this before
building the U-Boot of course.

Best regards,
Marek Vasut

  reply	other threads:[~2015-07-22  3:24 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-03  3:52 [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA dinguyen at opensource.altera.com
2015-06-03  3:52 ` [U-Boot] [PATCHv4 1/3] driver/ddr/altera: Add DDR driver for Altera's SDRAM controller dinguyen at opensource.altera.com
2015-06-09 11:55   ` Pavel Machek
2015-06-09 12:58     ` Wolfgang Denk
2015-06-09 15:51     ` Dinh Nguyen
2015-06-22  9:38       ` Chin Liang See
2015-06-22 10:56         ` Pavel Machek
2015-06-03  3:52 ` [U-Boot] [PATCHv4 2/3] driver/ddr/altera: Add the sdram calibration portion dinguyen at opensource.altera.com
2015-06-09 12:21   ` Pavel Machek
2015-06-03  3:52 ` [U-Boot] [PATCHv4 3/3] arm: socfpga: enable the Altera SDRAM controller driver dinguyen at opensource.altera.com
2015-06-09 12:25   ` Pavel Machek
2015-06-26 16:43 ` [U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA Marek Vasut
2015-06-26 20:01   ` Marek Vasut
2015-07-12 19:50     ` Marek Vasut
2015-07-17 19:58       ` Dinh Nguyen
2015-07-17 20:22         ` Marek Vasut
2015-07-18 23:51           ` Marek Vasut
2015-07-20 13:40           ` Dinh Nguyen
2015-07-20 18:36             ` Marek Vasut
2015-07-20 19:31               ` Dinh Nguyen
2015-07-20 19:40                 ` Marek Vasut
2015-07-21 22:46                   ` Dinh Nguyen
2015-07-22  3:24                     ` Marek Vasut [this message]
2015-07-23 18:29                       ` Dinh Nguyen
2015-07-24  3:57                         ` Marek Vasut
2015-07-22  8:27                   ` Dinh Nguyen
2015-07-22  9:00                     ` Marek Vasut
2015-07-22 12:57                       ` Dinh Nguyen
2015-07-22 13:01                         ` Marek Vasut
2015-07-23  4:03                           ` Dinh Nguyen

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