[U-Boot] [PATCHv4 0/3] drivers/ddr/altera: Add the DDR controller driver for SoCFPGA

[Marek Vasut <marex@denx.de>]

On Wednesday, July 22, 2015 at 02:57:49 PM, Dinh Nguyen wrote:
> On 7/22/15 4:00 AM, Marek Vasut wrote:
> > On Wednesday, July 22, 2015 at 10:27:10 AM, Dinh Nguyen wrote:
> >> On 7/20/15 2:40 PM, Marek Vasut wrote:
> >>> On Monday, July 20, 2015 at 09:31:39 PM, Dinh Nguyen wrote:
> >>> [...]
> >>> 
> >>>>>>> Hi,
> >>>>>>> 
> >>>>>>> yeah, I have some insane amount of cleanup patches and fixes
> >>>>>>> already. I will post them once I'm done. What I am sorely missing
> >>>>>>> is the UniPHY register interface documentation, it looks like that
> >>>>>>> is not public, so I don't exactly know if what sequencer.c does is
> >>>>>>> really correct. Sometimes I have serious doubts about that too .
> >>>>>>> Can you give me the documentation please ?
> >>>>>> 
> >>>>>> Have you seen this link[1]?
> >>>>> 
> >>>>> Yes, but that is by far not all of the registers used in the
> >>>>> sequencer.c, is it ?
> >>>> 
> >>>> Looks like it's in the entire emi.pdf file[1]. Please look at volume
> >>>> 3, or page 531 of 895. The section for the UniPHY.
> >>> 
> >>> I extracted all the possible addresses used in the sequencer while
> >>> cleaning it up, they're below.
> 
> I cannot find these in any documentation.

Cool %^)

> >>> I checked the EMI RM, sure, but there seems to be many more registers
> >>> all around the place than what are described in the EMI RM. Any ideas
> >>> please ? Maybe this is not even the UniPHY anymore ?
> >> 
> >> What I've been told was that the UniPHY was not really properly
> >> documented, and that when anyone needed to modify the registers, they
> >> would have to go back to the RTL to figure out exactly what's going on.
> > 
> > I guess you cannot provide me with the RTL, right ?
> 
> I don't think so, but will ask.

Thanks!

Best regards,
Marek Vasut