From mboxrd@z Thu Jan 1 00:00:00 1970 From: Pavel Machek Date: Tue, 28 Jul 2015 15:13:09 +0200 Subject: [U-Boot] [PATCH 000/172] socfpga: SPL and DDR init In-Reply-To: <1438030335-10631-1-git-send-email-marex@denx.de> References: <1438030335-10631-1-git-send-email-marex@denx.de> Message-ID: <20150728131309.GA3953@amd> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi! > This series fixes the SPL support on SoCFPGA and cleans up the DDR > init code such that it is becoming remotely mainlinable. After this > series, the SPL is capable of booting from both SD/MMC and QSPI NOR. > > There is still work to be done, but I'd like to start picking it up > so it can land in 2015.10 . Reviews and comments are welcome. Do you have series in git somewhere? I guess I'd like to review different diffs than these... Thanks, Pavel > Dinh Nguyen (3): > driver/ddr/altera: Add DDR driver for Altera's SDRAM controller > driver/ddr/altera: Add the sdram calibration portion > arm: socfpga: enable the Altera SDRAM controller driver > > Marek Vasut (169): > arm: socfpga: Move sdram_config.h to board dir > ddr: altera: Move struct sdram_prot_rule prototype > ddr: altera: Fix typo in mp_threshold1 programming > ddr: altera: Fix debug message format in sequencer > arm: socfpga: reset: Add missing reset manager regs > arm: socfpga: reset: Start reworking the SoCFPGA reset manager > arm: socfpga: reset: Implement unified function to toggle reset > arm: socfpga: reset: Replace ad-hoc reset functions > arm: socfpga: reset: Repair bridge reset handling > arm: socfpga: reset: Add function to reset add peripherals > arm: socfpga: reset: Add SDMMC, QSPI and DMA defines > arm: socfpga: clock: Get rid of cm_config_t typedef > arm: socfpga: clock: Clean up pll_config.h > arm: socfpga: scan: Staticize scan_mgr_io_scan_chain_prg() > arm: socfpga: scan: Zap redundant params in > scan_mgr_io_scan_chain_prg() > arm: socfpga: scan: Zap iocsr_scan_chain*_table() > arm: socfpga: system: Rework sysmgr_enable_warmrstcfgio() > arm: socfpga: system: Clean up pinmux_config.c > arm: socfpga: spl: Toggle warm reset config I/O bit > arm: socfpga: spl: Configure SCU and NIC-301 early > arm: socfpga: spl: Add missing reset logic > arm: socfpga: spl: Merge spl_board_init() into board_init_f() > arm: socfpga: spl: Remove custom linker script > arm: socfpga: spl: Add support for booting from SD/MMC > arm: socfpga: spl: Add support for booting from QSPI > arm: socfpga: spl: Add support for selecting boot device from BSEL > arm: socfpga: misc: Fix warm reset > arm: socfpga: misc: Add support for printing boot mode > arm: socfpga: misc: Export bootmode into environment variable > arm: socfpga: misc: Probe ethernet GMAC from OF > arm: socfpga: misc: Reset ethernet from OF > arm: socfpga: config: Move SPL GD and malloc to RAM > arm: socfpga: config: Zap incorrect config options > arm: socfpga: config: Exclude CONFIG_SPI_FLASH_MTD from SPL build > arm: socfpga: config: Enable CONFIG_SPI_FLASH_BAR > arm: socfpga: config: Fix LOADADDR > arm: socfpga: config: Make CONFIG_SPI_FLASH_MTD useful > Makefile: Add target for building bootable SPL image for SoCFPGA > ddr: altera: Minor indent fix in set_rank_and_odt_mask() > ddr: altera: Clean up ugly casts in sdram_calibration_full() > ddr: altera: Zap invocation of sdr_get_addr((u32 *)BASE_RW_MGR)" > ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_reg_file->.*) > ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_scc_mgr->.*) > ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_rw_load.*->.*) > ddr: altera: Dissolve invocation of sdr_get_addr(&sdr_mgr_.*->.*) > ddr: altera: Pluck out remaining sdr_get_addr() calls > ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESS > ddr: altera: Stop using SDR_CTRLGRP_ADDRESS directly > ddr: altera: Massage addr into I/O accessors > ddr: altera: Clean up hc_initialize_rom_data() > ddr: altera: Clean up initialize_reg_file() > ddr: altera: Clean up initialize_hps_phy() > ddr: altera: Clean up reg_file_set*() > ddr: altera: Clean up scc manager function args > ddr: altera: Reorder scc manager functions > ddr: altera: Implement universal scc manager config function > ddr: altera: Clean up scc_mgr_initialize() > ddr: altera: Shuffle around scc_mgr_set_*all_ranks() > ddr: altera: Implement universal scc_mgr_set_all_ranks() > ddr: altera: Clean up scc_mgr_load_dqs_for_write_group() > ddr: altera: Clean up scc_set_bypass_mode() > ddr: altera: Clean up scc_mgr_set_oct_out1_delay() > ddr: altera: Clean up scc_mgr_apply_group_dq_out1_delay() > ddr: altera: Clean up scc_mgr_*_delay() args > ddr: altera: Clean up scc_mgr_set_hhp_extras() > ddr: altera: Extract scc_mgr_set_hhp_extras() > ddr: altera: Clean up scc_mgr_zero_all() > ddr: altera: Clean up scc_mgr_zero_group() > FIXME: ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() > cleanup part 1 > ddr: altera: Internal scc_mgr_apply_group_all_out_delay_add() cleanup > part 2 > ddr: altera: Clean up > scc_mgr_apply_group_all_out_delay_add_all_ranks() > ddr: altera: Factor out instruction loading from > rw_mgr_mem_initialize() > ddr: altera: Factor out common code > ddr: altera: Minor clean up of set_jump_as_return() > ddr: altera: Fix ad-hoc iterative division implementation > ddr: altera: Rework initialize_tracking() > ddr: altera: Init my_param and my_gbl > ddr: altera: Rename initialize() to phy_mgr_initialize() > ddr: altera: Clean up run_mem_calibrate() > ddr: altera: Clean up phy_mgr_initialize() > ddr: altera: Clean up mem_config() > ddr: altera: Clean up mem_precharge_and_activate() > ddr: altera: Clean up set_rank_and_odt_mask() part 1 > ddr: altera: Clean up set_rank_and_odt_mask() part 2 > ddr: altera: Clean up set_rank_and_odt_mask() part 3 > ddr: altera: Minor clean up of mem_skip_calibrate() > ddr: altera: Trivial mem_calibrate() indent cleanup > ddr: altera: Internal mem_calibrate() cleanup part 1 > ddr: altera: Internal mem_calibrate() cleanup part 2 > ddr: altera: Internal mem_calibrate() cleanup part 3 > ddr: altera: Internal mem_calibrate() cleanup part 4 > ddr: altera: Internal mem_calibrate() cleanup part 5 > ddr: altera: Internal mem_calibrate() cleanup part 6 > ddr: altera: Minor clean up of rw_mgr_mem_initialize() > ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 1 > ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 2 > ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 3 > ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 4 > ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 5 > ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 6 > ddr: altera: Internal rw_mgr_mem_calibrate_vfifo() cleanup part 7 > ddr: altera: Extract guaranteed write from > rw_mgr_mem_calibrate_vfifo() > ddr: altera: Extract DQS enable calibration from > rw_mgr_mem_calibrate_vfifo() > ddr: altera: Extract Centering DQ/DQS from > rw_mgr_mem_calibrate_vfifo() > ddr: altera: Minor rw_mgr_mem_calibrate_read_load_patterns() cleanup > ddr: altera: Zap rw_mgr_mem_calibrate_read_test_patterns_all_ranks() > ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_patterns() > ddr: altera: Clean up > rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() > part 1 > ddr: altera: Clean up > rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() > part 2 > ddr: altera: Clean up > rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() > part 3 > ddr: altera: Clean up > rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase_sweep_dq_in_delay() > part 4 > ddr: altera: Clean up sdr_find_window_centre() part 1 > ddr: altera: Clean up sdr_find_window_centre() part 2 > ddr: altera: Clean up sdr_find_window_centre() part 3 > ddr: altera: Clean up sdr_*_phase() part 1 > ddr: altera: Clean up sdr_*_phase() part 2 > ddr: altera: Clean up sdr_*_phase() part 3 > ddr: altera: Clean up sdr_*_phase() part 4 > ddr: altera: Clean up sdr_*_phase() part 5 > ddr: altera: Clean up sdr_*_phase() part 6 > ddr: altera: Clean up sdr_*_phase() part 7 > ddr: altera: Clean up sdr_*_phase() part 8 > ddr: altera: Clean up sdr_*_phase() part 9 > ddr: altera: Clean up sdr_*_phase() part 10 > ddr: altera: Clean up rw_mgr_*_vfifo() part 1 > ddr: altera: Clean up rw_mgr_*_vfifo() part 2 > ddr: altera: Clean up find_vfifo_read() > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() > part 1 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() > part 2 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() > part 3 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() > part 4 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() > part 5 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() > part 6 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() > part 7 > ddr: altera: Clean up rw_mgr_mem_calibrate_read_test_all_ranks() > ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 1 > ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 2 > ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 3 > ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 4 > ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 5 > ddr: altera: Clean up rw_mgr_mem_calibrate_writes() > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 1 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 2 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 3 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 4 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 5 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 6 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 7 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 8 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 9 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 10 > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 11 > ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 1 > ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 2 > ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 3 > ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 4 > ddr: altera: Clean up rw_mgr_mem_calibrate_writes_center() part 5 > ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 1 > ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 2 > ddr: altera: Clean up rw_mgr_mem_calibrate_write_test() part 3 > ddr: altera: Clean up rw_mgr_mem_calibrate_write_test_issue() > ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_end() > ddr: altera: Clean up rw_mgr_mem_calibrate_lfifo() > ddr: altera: Minor clean up of rw_mgr_mem_handoff() > ddr: altera: Clean up of delay_for_n_mem_clocks() part 1 > ddr: altera: Clean up of delay_for_n_mem_clocks() part 2 > ddr: altera: Clean up of delay_for_n_mem_clocks() part 3 > ddr: altera: Clean up of delay_for_n_mem_clocks() part 4 > ddr: altera: Clean up of delay_for_n_mem_clocks() part 5 > > Makefile | 13 + > arch/arm/mach-socfpga/clock_manager.c | 28 +- > arch/arm/mach-socfpga/include/mach/clock_manager.h | 12 +- > arch/arm/mach-socfpga/include/mach/reset_manager.h | 60 +- > arch/arm/mach-socfpga/include/mach/scan_manager.h | 23 +- > arch/arm/mach-socfpga/include/mach/sdram.h | 298 +- > .../arm/mach-socfpga/include/mach/system_manager.h | 7 +- > arch/arm/mach-socfpga/misc.c | 115 +- > arch/arm/mach-socfpga/reset_manager.c | 99 +- > arch/arm/mach-socfpga/scan_manager.c | 31 +- > arch/arm/mach-socfpga/spl.c | 220 +- > arch/arm/mach-socfpga/system_manager.c | 16 +- > arch/arm/mach-socfpga/u-boot-spl.lds | 45 - > board/altera/socfpga/Makefile | 4 +- > board/altera/socfpga/qts/Makefile | 7 - > board/altera/socfpga/qts/sdram_config.h | 100 + > board/altera/socfpga/wrap_iocsr_config.c | 41 + > board/altera/socfpga/wrap_pinmux_config.c | 35 + > board/altera/socfpga/wrap_pll_config.c | 144 + > configs/socfpga_arria5_defconfig | 9 + > configs/socfpga_cyclone5_defconfig | 10 + > configs/socfpga_socrates_defconfig | 11 +- > drivers/ddr/altera/Makefile | 11 + > drivers/ddr/altera/sdram.c | 817 +++++ > drivers/ddr/altera/sequencer.c | 3806 ++++++++++++++++++++ > drivers/ddr/altera/sequencer.h | 299 ++ > drivers/ddr/altera/sequencer_auto.h | 128 + > drivers/ddr/altera/sequencer_auto_ac_init.h | 84 + > drivers/ddr/altera/sequencer_auto_inst_init.h | 268 ++ > drivers/ddr/altera/sequencer_defines.h | 121 + > include/configs/socfpga_arria5.h | 7 +- > include/configs/socfpga_common.h | 63 +- > include/configs/socfpga_cyclone5.h | 7 +- > include/fdtdec.h | 1 + > lib/fdtdec.c | 1 + > scripts/Makefile.spl | 11 + > 36 files changed, 6566 insertions(+), 386 deletions(-) > delete mode 100644 arch/arm/mach-socfpga/u-boot-spl.lds > delete mode 100644 board/altera/socfpga/qts/Makefile > create mode 100644 board/altera/socfpga/qts/sdram_config.h > create mode 100644 board/altera/socfpga/wrap_iocsr_config.c > create mode 100644 board/altera/socfpga/wrap_pinmux_config.c > create mode 100644 board/altera/socfpga/wrap_pll_config.c > create mode 100644 drivers/ddr/altera/Makefile > create mode 100644 drivers/ddr/altera/sdram.c > create mode 100644 drivers/ddr/altera/sequencer.c > create mode 100644 drivers/ddr/altera/sequencer.h > create mode 100644 drivers/ddr/altera/sequencer_auto.h > create mode 100644 drivers/ddr/altera/sequencer_auto_ac_init.h > create mode 100644 drivers/ddr/altera/sequencer_auto_inst_init.h > create mode 100644 drivers/ddr/altera/sequencer_defines.h > -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) 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