From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Mon, 3 Aug 2015 18:23:48 +0200 Subject: [U-Boot] [PATCH 000/172] socfpga: SPL and DDR init In-Reply-To: <55BF85CD.3030504@opensource.altera.com> References: <1438030335-10631-1-git-send-email-marex@denx.de> <55BF85CD.3030504@opensource.altera.com> Message-ID: <201508031823.49033.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Monday, August 03, 2015 at 05:16:29 PM, Dinh Nguyen wrote: > On 07/27/2015 03:49 PM, Marek Vasut wrote: > > This series fixes the SPL support on SoCFPGA and cleans up the DDR > > init code such that it is becoming remotely mainlinable. After this > > series, the SPL is capable of booting from both SD/MMC and QSPI NOR. > > > > There is still work to be done, but I'd like to start picking it up > > so it can land in 2015.10 . Reviews and comments are welcome. > > Thank you so much for putting this series together! For the whole series: > > Acked-by: Dinh Nguyen Applied all to u-boot-socfpga/master, thanks! Best regards, Marek Vasut