[U-Boot] [PATCH 1/3][v2] imx: usb: ehci-mx6: reg accessor cleanups

[Marek Vasut <marex@denx.de>]

On Wednesday, August 05, 2015 at 11:03:34 PM, Adrian Alonso wrote:
> Cleanup read/write register access, use clr/set bits_le32
> 
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> ---
> Changes for V2:
> Split from patch imx: usb: ehci-mx6: add usb support for imx7d soc

Acked-by: Marek Vasut <marex@denx.de>

btw ...

>  drivers/usb/host/ehci-mx6.c | 51
> ++++++++++++++++----------------------------- 1 file changed, 18
> insertions(+), 33 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
> index 951dd3b..0f94c8b 100644
> --- a/drivers/usb/host/ehci-mx6.c
> +++ b/drivers/usb/host/ehci-mx6.c
> @@ -67,7 +67,7 @@ static void usb_internal_phy_clock_gate(int index, int
> on)
> 
>  	phy_reg = (void __iomem *)phy_bases[index];
>  	phy_reg += on ? USBPHY_CTRL_CLR : USBPHY_CTRL_SET;
> -	__raw_writel(USBPHY_CTRL_CLKGATE, phy_reg);
> +	writel(USBPHY_CTRL_CLKGATE, phy_reg);
>  }
> 
>  static void usb_power_config(int index)
> @@ -100,14 +100,14 @@ static void usb_power_config(int index)
>  	 * is totally controlled by IC, so the Software only needs
>  	 * to enable them at initializtion.
>  	 */
> -	__raw_writel(ANADIG_USB2_CHRG_DETECT_EN_B |
> +	writel(ANADIG_USB2_CHRG_DETECT_EN_B |
>  		     ANADIG_USB2_CHRG_DETECT_CHK_CHRG_B,
>  		     chrg_detect);
> 
> -	__raw_writel(ANADIG_USB2_PLL_480_CTRL_BYPASS,
> +	writel(ANADIG_USB2_PLL_480_CTRL_BYPASS,
>  		     pll_480_ctrl_clr);
> 
> -	__raw_writel(ANADIG_USB2_PLL_480_CTRL_ENABLE |
> +	writel(ANADIG_USB2_PLL_480_CTRL_ENABLE |
>  		     ANADIG_USB2_PLL_480_CTRL_POWER |
>  		     ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS,
>  		     pll_480_ctrl_set);
> @@ -119,7 +119,6 @@ static int usb_phy_enable(int index, struct usb_ehci
> *ehci) void __iomem *phy_reg;
>  	void __iomem *phy_ctrl;
>  	void __iomem *usb_cmd;
> -	u32 val;
> 
>  	if (index >= ARRAY_SIZE(phy_bases))
>  		return 0;
> @@ -129,36 +128,27 @@ static int usb_phy_enable(int index, struct usb_ehci
> *ehci) usb_cmd = (void __iomem *)&ehci->usbcmd;
> 
>  	/* Stop then Reset */
> -	val = __raw_readl(usb_cmd);
> -	val &= ~UCMD_RUN_STOP;
> -	__raw_writel(val, usb_cmd);
> -	while (__raw_readl(usb_cmd) & UCMD_RUN_STOP)
> +	clrbits_le32(usb_cmd, UCMD_RUN_STOP);
> +	while (readl(usb_cmd) & UCMD_RUN_STOP)
>  		;

While you're at this, can you please zap these unbounded loops and replace
them with something like wait_for_bit():

+static int wait_for_bit(u32 *reg, const u32 mask, bool set,
+                        const unsigned int timeout)
+{
+       u32 val;
+       unsigned long start = get_timer(0);
+
+       while (1) {
+               val = readl(reg);
+               if (!set)
+                       val = ~val;
+
+               if ((val & mask) == mask)
+                       return 0;
+
+               if (get_timer(start) > timeout)
+                       break;
+
+               udelay(1);
+       }
+
+       debug("%s: Timeout (reg=%p mask=%08x wait_set=%i)\n",
+             __func__, reg, mask, set);
+
+       return -ETIMEDOUT;
+}

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