From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Wed, 5 Aug 2015 23:34:33 +0200
Subject: [U-Boot] [PATCH 3/3][v2] imx: usb: ehci-mx6: add usb support
	for imx7d soc
In-Reply-To: <1438808616-25585-3-git-send-email-aalonso@freescale.com>
References: <1438808616-25585-1-git-send-email-aalonso@freescale.com>
 <1438808616-25585-3-git-send-email-aalonso@freescale.com>
Message-ID: <201508052334.34015.marex@denx.de>
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To: u-boot@lists.denx.de

On Wednesday, August 05, 2015 at 11:03:36 PM, Adrian Alonso wrote:
> Extend ehci-mx6 usb driver to support imx7d usb
> 
> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
> ---
> Changes for V2:
> Add usb_power_config and usb_phy_mode for usb otg id detection for imx7d
> 
>  drivers/usb/host/Makefile   |  1 +
>  drivers/usb/host/ehci-mx6.c | 99
> ++++++++++++++++++++++++++++++++++++--------- 2 files changed, 81
> insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
> index 6cc3bbd..8537b6b 100644
> --- a/drivers/usb/host/Makefile
> +++ b/drivers/usb/host/Makefile
> @@ -36,6 +36,7 @@ obj-$(CONFIG_USB_EHCI_MXC) += ehci-mxc.o
>  obj-$(CONFIG_USB_EHCI_MXS) += ehci-mxs.o
>  obj-$(CONFIG_USB_EHCI_MX5) += ehci-mx5.o
>  obj-$(CONFIG_USB_EHCI_MX6) += ehci-mx6.o
> +obj-$(CONFIG_USB_EHCI_MX7) += ehci-mx6.o
>  obj-$(CONFIG_USB_EHCI_OMAP) += ehci-omap.o
>  obj-$(CONFIG_USB_EHCI_PPC4XX) += ehci-ppc4xx.o
>  obj-$(CONFIG_USB_EHCI_MARVELL) += ehci-marvell.o
> diff --git a/drivers/usb/host/ehci-mx6.c b/drivers/usb/host/ehci-mx6.c
> index afc248b..b10541d 100644
> --- a/drivers/usb/host/ehci-mx6.c
> +++ b/drivers/usb/host/ehci-mx6.c
> @@ -45,7 +45,10 @@
>  #define ANADIG_USB2_PLL_480_CTRL_POWER		0x00001000
>  #define ANADIG_USB2_PLL_480_CTRL_EN_USB_CLKS	0x00000040
> 
> -
> +#define USBNC_OFFSET		0x200
> +#define USBNC_PHYSTATUS_ID_DIG	(1 << 4) /* otg_id status */
> +#define USBNC_PHYCFG2_ACAENB	(1 << 4) /* otg_id detection enable */
> +#define UCTRL_PM                (1 << 9) /* OTG Power Mask */
>  #define UCTRL_OVER_CUR_POL	(1 << 8) /* OTG Polarity of Overcurrent */
>  #define UCTRL_OVER_CUR_DIS	(1 << 7) /* Disable OTG Overcurrent Detection
> */
> 
> @@ -53,6 +56,7 @@
>  #define UCMD_RUN_STOP           (1 << 0) /* controller run/stop */
>  #define UCMD_RESET		(1 << 1) /* controller reset */
> 
> +#if defined(CONFIG_MX6)
>  static const unsigned phy_bases[] = {
>  	USB_PHY0_BASE_ADDR,
>  	USB_PHY1_BASE_ADDR,
> @@ -153,6 +157,23 @@ static int usb_phy_enable(int index, struct usb_ehci
> *ehci) return 0;
>  }
> 
> +int usb_phy_mode(int port)
> +{
> +	void __iomem *phy_reg;
> +	void __iomem *phy_ctrl;
> +	u32 val;
> +
> +	phy_reg = (void __iomem *)phy_bases[port];
> +	phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL);
> +
> +	val = readl(phy_ctrl);
> +
> +	if (val & USBPHY_CTRL_OTG_ID)
> +		return USB_INIT_DEVICE;
> +	else
> +		return USB_INIT_HOST;
> +}
> +
>  /* Base address for this IP block is 0x02184800 */
>  struct usbnc_regs {
>  	u32	ctrl[4];	/* otg/host1-3 */
> @@ -161,12 +182,56 @@ struct usbnc_regs {
>  	u32	otg_phy_ctrl_0;
>  	u32	uh1_phy_ctrl_0;
>  };
> +#elif defined(CONFIG_MX7)
> +struct usbnc_regs {
> +        u32 ctrl1;
> +        u32 ctrl2;
> +	u32 reserve1[10];
> +	u32 phy_cfg1;
> +	u32 phy_cfg2;
> +	u32 phy_status;
> +        u32 reserve2[4];
> +        u32 adp_cfg1;
> +        u32 adp_cfg2;
> +        u32 adp_status;
> +};

This structure has some indentation problems. Did you run checkpatch on
this patch ? Otherwise, the series looks good. Please fix minor things
and I'll pick it. Thanks!