From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [v2 3/6] spi: cadence_qspi: remove sram polling from flash write
Date: Thu, 13 Aug 2015 19:34:16 +0200 [thread overview]
Message-ID: <201508131934.16239.marex@denx.de> (raw)
In-Reply-To: <55CCC62D.5020701@st.com>
On Thursday, August 13, 2015 at 06:30:37 PM, vikasm wrote:
> Hi Marek,
>
> On 08/12/2015 07:11 PM, Marek Vasut wrote:
> > On Thursday, July 16, 2015 at 04:27:31 AM, Vikas Manocha wrote:
> >> There is no need to poll sram level before writing to flash, data going
> >> to SRAM till sram is full, after that backpressure will take over.
> >
> > Please see the question I posed in 2/6 v2 .
>
> replied in 2/6 v2.
[...]
> >> /* Write to SRAM FIFO with polling SRAM fill level. */
> >> static int qpsi_write_sram_fifo_push(struct cadence_spi_platdata *plat,
> >>
> >> const void *src_addr, unsigned int num_bytes)
> >>
> >> {
> >>
> >> - const void *reg_base = plat->regbase;
> >> - void *dest_addr = plat->ahbbase;
> >> - unsigned int retry = CQSPI_REG_RETRY;
> >> - unsigned int sram_level;
> >> + int i = 0;
> >> + unsigned int *dest_addr = plat->ahbbase;
> >>
> >> unsigned int wr_bytes;
> >>
> >> - unsigned char *src = (unsigned char *)src_addr;
> >> + unsigned int *src_ptr = (unsigned int *)src_addr;
> >>
> >> int remaining = num_bytes;
> >> unsigned int page_size = plat->page_size;
> >>
> >> - unsigned int sram_threshold_words = CQSPI_REG_SRAM_THRESHOLD_WORDS;
> >>
> >> while (remaining > 0) {
> >>
> >> - retry = CQSPI_REG_RETRY;
> >> - while (retry--) {
> >> - sram_level = CQSPI_GET_WR_SRAM_LEVEL(reg_base);
> >> - if (sram_level <= sram_threshold_words)
> >> - break;
> >> - }
> >> - if (!retry) {
> >> - printf("QSPI: SRAM fill level (0x%08x) not hit lower
> >
> > expected level
> >
> >> (0x%08x)", - sram_level, sram_threshold_words);
> >> - return -1;
> >> - }
> >>
> >> /* Write a page or remaining bytes. */
> >> wr_bytes = (remaining > page_size) ?
> >>
> >> page_size : remaining;
> >>
> >> - cadence_qspi_apb_write_fifo_data(dest_addr, src, wr_bytes);
> >> - src += wr_bytes;
> >>
> >> remaining -= wr_bytes;
> >>
> >> + while (wr_bytes >= CQSPI_FIFO_WIDTH) {
> >> + for (i = 0; i < CQSPI_FIFO_WIDTH/sizeof(dest_addr); i++)
> >> + writel(*(src_ptr+i), dest_addr+i);
> >
> > Why don't you use memcpy instead , didn't you say you're copying data
> > to/from SRAM? Is src_ptr value always aligned ?
>
> i think you are right, i will check it & fix in the next version.
But is memcpy() really correct ? It does byte access and doesn't enforce
ordering in any way.
next prev parent reply other threads:[~2015-08-13 17:34 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-16 2:27 [U-Boot] [v2 0/6] spi: cadence_qspi: optimize & fix indirect rd-writes Vikas Manocha
2015-07-16 2:27 ` [U-Boot] [v2 1/6] spi: cadence_qspi: move trigger base configuration in init Vikas Manocha
2015-08-13 2:07 ` Marek Vasut
2015-08-13 15:50 ` vikasm
2015-08-13 17:35 ` Marek Vasut
2015-08-13 19:05 ` vikasm
2015-08-14 1:24 ` vikas
2015-08-14 1:43 ` Marek Vasut
2015-08-14 1:44 ` vikas
2015-08-14 1:55 ` Marek Vasut
2015-07-16 2:27 ` [U-Boot] [v2 2/6] spi: cadence_qspi: remove sram polling from flash read Vikas Manocha
2015-08-13 2:09 ` Marek Vasut
2015-08-13 16:27 ` vikasm
2015-08-13 17:33 ` Marek Vasut
2015-08-13 19:49 ` vikas
2015-08-13 20:35 ` Marek Vasut
2015-08-13 21:04 ` vikas
2015-08-13 22:47 ` Marek Vasut
2015-08-13 23:18 ` vikas
2015-08-13 23:46 ` Marek Vasut
2015-08-14 0:26 ` vikas
2015-08-14 0:44 ` Marek Vasut
2015-08-14 0:46 ` vikas
2015-08-14 1:03 ` Marek Vasut
2015-08-14 1:05 ` vikas
2015-08-14 3:54 ` Marek Vasut
2015-07-16 2:27 ` [U-Boot] [v2 3/6] spi: cadence_qspi: remove sram polling from flash write Vikas Manocha
2015-08-13 2:11 ` Marek Vasut
2015-08-13 16:30 ` vikasm
2015-08-13 17:34 ` Marek Vasut [this message]
2015-07-16 2:27 ` [U-Boot] [v2 4/6] spi: cadence_qspi: fix indirect read/write start address Vikas Manocha
2015-07-16 2:27 ` [U-Boot] [v2 5/6] spi: cadence_qspi: fix base trigger address & transfer " Vikas Manocha
2015-08-13 2:15 ` Marek Vasut
2015-08-13 16:42 ` vikasm
2015-08-13 21:36 ` vikas
2015-08-13 22:48 ` Marek Vasut
2015-08-14 0:37 ` vikas
2015-08-14 1:04 ` Marek Vasut
2015-08-14 1:39 ` vikas
2015-08-14 1:56 ` Marek Vasut
2015-08-14 2:14 ` Vikas MANOCHA
2015-07-16 2:27 ` [U-Boot] [v2 6/6] spi: cadence_qspi: get fifo width from device tree Vikas Manocha
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=201508131934.16239.marex@denx.de \
--to=marex@denx.de \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox