From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Thu, 13 Aug 2015 19:34:16 +0200
Subject: [U-Boot] [v2 3/6] spi: cadence_qspi: remove sram polling from
	flash write
In-Reply-To: <55CCC62D.5020701@st.com>
References: <1437013654-29387-1-git-send-email-vikas.manocha@st.com>
 <201508130411.53564.marex@denx.de> <55CCC62D.5020701@st.com>
Message-ID: <201508131934.16239.marex@denx.de>
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To: u-boot@lists.denx.de

On Thursday, August 13, 2015 at 06:30:37 PM, vikasm wrote:
> Hi Marek,
> 
> On 08/12/2015 07:11 PM, Marek Vasut wrote:
> > On Thursday, July 16, 2015 at 04:27:31 AM, Vikas Manocha wrote:
> >> There is no need to poll sram level before writing to flash, data going
> >> to SRAM till sram is full, after that backpressure will take over.
> > 
> > Please see the question I posed in 2/6 v2 .
> 
> replied in 2/6 v2.

[...]

> >>  /* Write to SRAM FIFO with polling SRAM fill level. */
> >>  static int qpsi_write_sram_fifo_push(struct cadence_spi_platdata *plat,
> >>  
> >>  				const void *src_addr, unsigned int num_bytes)
> >>  
> >>  {
> >> 
> >> -	const void *reg_base = plat->regbase;
> >> -	void *dest_addr = plat->ahbbase;
> >> -	unsigned int retry = CQSPI_REG_RETRY;
> >> -	unsigned int sram_level;
> >> +	int i = 0;
> >> +	unsigned int *dest_addr = plat->ahbbase;
> >> 
> >>  	unsigned int wr_bytes;
> >> 
> >> -	unsigned char *src = (unsigned char *)src_addr;
> >> +	unsigned int *src_ptr = (unsigned int *)src_addr;
> >> 
> >>  	int remaining = num_bytes;
> >>  	unsigned int page_size = plat->page_size;
> >> 
> >> -	unsigned int sram_threshold_words = CQSPI_REG_SRAM_THRESHOLD_WORDS;
> >> 
> >>  	while (remaining > 0) {
> >> 
> >> -		retry = CQSPI_REG_RETRY;
> >> -		while (retry--) {
> >> -			sram_level = CQSPI_GET_WR_SRAM_LEVEL(reg_base);
> >> -			if (sram_level <= sram_threshold_words)
> >> -				break;
> >> -		}
> >> -		if (!retry) {
> >> -			printf("QSPI: SRAM fill level (0x%08x) not hit lower
> > 
> > expected level
> > 
> >> (0x%08x)", -			       sram_level, sram_threshold_words);
> >> -			return -1;
> >> -		}
> >> 
> >>  		/* Write a page or remaining bytes. */
> >>  		wr_bytes = (remaining > page_size) ?
> >>  		
> >>  					page_size : remaining;
> >> 
> >> -		cadence_qspi_apb_write_fifo_data(dest_addr, src, wr_bytes);
> >> -		src += wr_bytes;
> >> 
> >>  		remaining -= wr_bytes;
> >> 
> >> +		while (wr_bytes >= CQSPI_FIFO_WIDTH) {
> >> +			for (i = 0; i < CQSPI_FIFO_WIDTH/sizeof(dest_addr); i++)
> >> +				writel(*(src_ptr+i), dest_addr+i);
> > 
> > Why don't you use memcpy instead , didn't you say you're copying data
> > to/from SRAM? Is src_ptr value always aligned ?
> 
> i think you are right, i will check it & fix in the next version.

But is memcpy() really correct ? It does byte access and doesn't enforce 
ordering in any way.