From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Fri, 14 Aug 2015 00:48:33 +0200
Subject: [U-Boot] [v2 5/6] spi: cadence_qspi: fix base trigger address &
	transfer start address
In-Reply-To: <55CD0DDF.7050300@st.com>
References: <1437013654-29387-1-git-send-email-vikas.manocha@st.com>
 <55CCC8FC.4010406@st.com> <55CD0DDF.7050300@st.com>
Message-ID: <201508140048.33888.marex@denx.de>
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On Thursday, August 13, 2015 at 11:36:31 PM, vikas wrote:
> Hi Marek,

Hi!

> On 08/13/2015 09:42 AM, vikasm wrote:
> > Hi Marek,
> > 
> > On 08/12/2015 07:15 PM, Marek Vasut wrote:
> >> On Thursday, July 16, 2015 at 04:27:33 AM, Vikas Manocha wrote:
> >>> This patch is to separate the base trigger from the read/write transfer
> >>> start addresses.
> >> 
> >> This patch breaks the QSPI support on SoCFPGA.
> > 
> > ok, can you please try to debug the issue. Logically this patch looks
> > good to me unless there is something specific to socfpga.
> 
> One quick check, can you test if it works on reverting the trigger base in
> arch/arm/dts/socfpga.dtsi from <0x00000000 0x0010> to <0xffa00000 0x1000>.

Can you please spin V3 of the patchset first, one which omits the buggy bits,
so I can test it on a more final form of the patches ? Please keep me on CC,
I'll test it then.

Thanks!

Best regards,
Marek Vasut