From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Fri, 21 Aug 2015 03:07:38 +0200
Subject: [U-Boot] [PATCH v2 1/2] arm: socfpga: mmc: Enable calibration
	for drvsel and smpsel
In-Reply-To: <1440118440.2020.0.camel@clsee-VirtualBox>
References: <1440055109-2252-1-git-send-email-clsee@altera.com>
 <1440118440.2020.0.camel@clsee-VirtualBox>
Message-ID: <201508210307.38728.marex@denx.de>
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On Friday, August 21, 2015 at 02:54:00 AM, Chin Liang See wrote:
> Hi guys,

Hi,

> Any comment or ack for this patch?

Please don't expect that the reviewers/maintainers have nothing else on
their plate but to review your patch. Besides, this change is really low
priority one, since thus far the SD/MMC works fine on all of the SoCFPGA
boards to my knowledge.

Also, I thought we agreed to wait for Simon to comment on this patch.
You don't have to repost a patch before the discussion settles a bit.
This doesn't help, it only puts burden on the receiving side, chill :)
Let alone the fact that this code should be part of the DWMMC core, as
it is not socfpga specific.

What I would be really interested in is a proper description of the
calibration algorithm. What is the goal and how do you achieve it ?

Best regards,
Marek Vasut