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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] arm: socfpga: dm: Fix DM initialization failure after warm reset
Date: Fri, 28 Aug 2015 14:01:39 +0200	[thread overview]
Message-ID: <201508281401.39402.marex@denx.de> (raw)
In-Reply-To: <55E04898.2080506@boschrexroth.de>

On Friday, August 28, 2015 at 01:40:08 PM, Jian Luo wrote:
> On 28.08.2015 12:30, Marek Vasut wrote:
> > On Friday, August 28, 2015 at 12:27:18 PM, Jian Luo wrote:
> >> Hi Marek,
> >> 
> >> On 28.08.2015 11:24, Marek Vasut wrote:
> >>> On Friday, August 28, 2015 at 10:41:50 AM, Jian Luo wrote:
> >>>> gd->dm_root is not cleared in SPL after warm reset.
> >>>> This might cause DM initilazation failure.
> >>>> 
> >>>> Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
> >>> 
> >>> Hi!
> >>> 
> >>>> ---
> >>>> 
> >>>>     arch/arm/mach-socfpga/spl.c | 6 ++++++
> >>>>     1 file changed, 6 insertions(+)
> >>>> 
> >>>> diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
> >>>> index 13ec24b..59fe1f2 100644
> >>>> --- a/arch/arm/mach-socfpga/spl.c
> >>>> +++ b/arch/arm/mach-socfpga/spl.c
> >>>> @@ -181,5 +181,11 @@ void board_init_f(ulong dummy)
> >>>> 
> >>>>            /* Configure simple malloc base pointer into RAM. */
> >>>>            gd->malloc_base = CONFIG_SYS_TEXT_BASE + (1024 * 1024);
> >>>> 
> >>>> +       /*
> >>>> +        * gd->dm_root might contain non-zero value after warm reset.
> >>>> +        * Clear it to avoid dm_init error
> >>>> +        */
> >>>> +       gd->dm_root = NULL;
> >>> 
> >>> Nit: The indent should be done with tabs, not spaces. I think the email
> >>> got messed up somewhere along the way.
> >> 
> >> Yes, sorry. I can't setup git send-email in our company network.
> >> Thunderbird messed the indent up.
> > 
> > Why not ?
> 
> "Security policy". :(

But thunderbird works ? Can't you just copy the SMTP settings from thunderbird
into gitconfig ? :)

> >>> The bigger concern I have is that if you look into arch/arm/lib/crt0.S
> >>> , you will see that the entire global data are cleared there (_main,
> >>> label clr_gd: ) and this code is executed before the board_init_f() .
> >> 
> >> This was my first assumption, it should be cleared in crt0.S.
> >> I was using U-Boot to load a VxWorks image.
> >> And wrote 1 to rstmgr ctrl in VxWorks to do a warm reset.
> >> Afterwards the SPL hangs.
> > 
> > Hangs in which way ? Can you share the output please ?
> 
> Sorry, should attached the output in the first place.
> With CONFIG_DM_WARN defined:
> 
> *************************
> ***** VxWorks is up *****
> *************************
> 
> -> reboot
> 
> U-Boot SPL 2015.10-rc2-00192-ge122af6-dirty (Aug 28 2015 - 11:35:27)
> drivers/ddr/altera/sequencer.c: Preparing to start memory calibration
> drivers/ddr/altera/sequencer.c: CALIBRATION PASSED
> drivers/ddr/altera/sequencer.c: Calibration complete
> Virtual root driver already exists!
> ### ERROR ### Please RESET the board ###

Oh, ew. Now this is _weird_ . Simon, any idea(s) ?

> >> It did not happen if I do reset direct in U-Boot.
> >> I'll attach a JTAG Debug to dig deeper.
> > 
> > Neat, that'd be really awesome, thanks for looking into this !
> > 
> >>> Can you try tracking it down a bit more? I suspect that you might see
> >>> dm_init_and_scan() returned error -22 , is that what you observe
> >>> please?
> >> 
> >> Yes, in dm_init() where gd->dm_root will be checked.
> > 
> > But if you get -ENOMEM, that means somehow the malloc is broken here.
> > I wonder if this explicit setting of gd->malloc_area is screwing
> > something up ?
> 
> Isn't 22 EINVAL?

Yes it is, sorry.

> It's in the drivers/core/root.c line 105

Uhm ... how can this be if GD is zeroed out ?

  reply	other threads:[~2015-08-28 12:01 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-28  8:41 [U-Boot] [PATCH] arm: socfpga: dm: Fix DM initialization failure after warm reset Jian Luo
2015-08-28  9:24 ` Marek Vasut
2015-08-28 10:27   ` Jian Luo
2015-08-28 10:30     ` Marek Vasut
2015-08-28 11:40       ` Jian Luo
2015-08-28 12:01         ` Marek Vasut [this message]
2015-08-28 12:09           ` Jian Luo
2015-08-28 21:48             ` Marek Vasut
2015-08-31 13:00               ` Jian Luo
2015-08-31 13:28                 ` Marek Vasut
2015-09-02 16:27                   ` Jian Luo
2015-09-03  9:41                     ` Marek Vasut
2015-09-03 10:03                       ` Jian Luo
2015-09-03 10:09                         ` Marek Vasut
2015-09-03 10:17                           ` Jian Luo
2015-09-03 10:46                             ` Marek Vasut
2015-09-03 11:12                               ` Jian Luo
2015-09-03 11:14                                 ` Marek Vasut
2015-09-04  0:23                                   ` Simon Glass
2015-09-04  7:36                                     ` Jian Luo
2015-09-04 14:16                                       ` Simon Glass
2015-09-04 14:25                                         ` Marek Vasut
2015-09-04 14:26                                           ` Simon Glass
2015-09-04 14:32                                             ` Marek Vasut
2015-09-22 12:26                                               ` Jian Luo
2015-08-28 23:21 ` Simon Glass
2015-08-29  7:56   ` Marek Vasut
2015-08-29 14:39     ` Simon Glass
2015-08-29 14:46       ` Marek Vasut
2015-08-29 14:49         ` Simon Glass
2015-08-29 15:45           ` Marek Vasut
2015-08-29 16:54             ` Simon Glass
2015-08-29 19:19               ` Marek Vasut

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