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* [U-Boot] [PATCH resend 1/2] ARM: Add workaround for Cortex-A9 errata 845369
  2015-08-31  3:15 [U-Boot] [PATCH resend 1/2] ARM: Add workaround for Cortex-A9 errata 845369 Peng Fan
@ 2015-08-31  2:13 ` Peng Fan
  2015-08-31  3:15 ` [U-Boot] [PATCH resend 2/2] imx: mx6: Enable ARM errata workaround for 845369 Peng Fan
  1 sibling, 0 replies; 3+ messages in thread
From: Peng Fan @ 2015-08-31  2:13 UTC (permalink / raw)
  To: u-boot

My bad. Please ignore the two patches 1/2 and 2/2.

Regards,
Peng.

On Mon, Aug 31, 2015 at 11:15:16AM +0800, Peng Fan wrote:
>From: Nitin Garg <nitin.garg@freescale.com>
>
>Under very rare timing circumstances, transition into
>streaming mode might create a data corruption. Exists on
>all Cortex-A9 revisions.
>
>Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
>Cc: Stefano Babic <sbabic@denx.de>
>Cc: Fabio Estevam <fabio.estevam@freescale.com>
>Cc: Albert Aribaud <albert.u.boot@aribaud.net>
>---
>
>Original patch:
>http://lists.denx.de/pipermail/u-boot/2015-April/209724.html
>
> README                     | 1 +
> arch/arm/cpu/armv7/start.S | 5 +++++
> 2 files changed, 6 insertions(+)
>
>diff --git a/README b/README
>index a52ff46..7da9415 100644
>--- a/README
>+++ b/README
>@@ -683,6 +683,7 @@ The following options need to be configured:
> 		CONFIG_ARM_ERRATA_751472
> 		CONFIG_ARM_ERRATA_794072
> 		CONFIG_ARM_ERRATA_761320
>+		CONFIG_ARM_ERRATA_845369
> 
> 		If set, the workarounds for these ARM errata are applied early
> 		during U-Boot startup. Note that these options force the
>diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
>index b180944..0c4fe61 100644
>--- a/arch/arm/cpu/armv7/start.S
>+++ b/arch/arm/cpu/armv7/start.S
>@@ -163,6 +163,11 @@ ENTRY(cpu_init_cp15)
> 	orr	r0, r0, #1 << 21	@ set bit #21
> 	mcr	p15, 0, r0, c15, c0, 1	@ write diagnostic register
> #endif
>+#ifdef CONFIG_ARM_ERRATA_845369
>+	mrc	p15, 0, r0, c15, c0, 1	@ read diagnostic register
>+	orr	r0, r0, #1 << 22	@ set bit #22
>+	mcr	p15, 0, r0, c15, c0, 1	@ write diagnostic register
>+#endif
> 
> 	mov	r5, lr			@ Store my Caller
> 	mrc	p15, 0, r1, c0, c0, 0	@ r1 has Read Main ID Register (MIDR)
>-- 
>1.8.4
>
>

-- 

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot] [PATCH resend 1/2] ARM: Add workaround for Cortex-A9 errata 845369
@ 2015-08-31  3:15 Peng Fan
  2015-08-31  2:13 ` Peng Fan
  2015-08-31  3:15 ` [U-Boot] [PATCH resend 2/2] imx: mx6: Enable ARM errata workaround for 845369 Peng Fan
  0 siblings, 2 replies; 3+ messages in thread
From: Peng Fan @ 2015-08-31  3:15 UTC (permalink / raw)
  To: u-boot

From: Nitin Garg <nitin.garg@freescale.com>

Under very rare timing circumstances, transition into
streaming mode might create a data corruption. Exists on
all Cortex-A9 revisions.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
---

Original patch:
http://lists.denx.de/pipermail/u-boot/2015-April/209724.html

 README                     | 1 +
 arch/arm/cpu/armv7/start.S | 5 +++++
 2 files changed, 6 insertions(+)

diff --git a/README b/README
index a52ff46..7da9415 100644
--- a/README
+++ b/README
@@ -683,6 +683,7 @@ The following options need to be configured:
 		CONFIG_ARM_ERRATA_751472
 		CONFIG_ARM_ERRATA_794072
 		CONFIG_ARM_ERRATA_761320
+		CONFIG_ARM_ERRATA_845369
 
 		If set, the workarounds for these ARM errata are applied early
 		during U-Boot startup. Note that these options force the
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index b180944..0c4fe61 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -163,6 +163,11 @@ ENTRY(cpu_init_cp15)
 	orr	r0, r0, #1 << 21	@ set bit #21
 	mcr	p15, 0, r0, c15, c0, 1	@ write diagnostic register
 #endif
+#ifdef CONFIG_ARM_ERRATA_845369
+	mrc	p15, 0, r0, c15, c0, 1	@ read diagnostic register
+	orr	r0, r0, #1 << 22	@ set bit #22
+	mcr	p15, 0, r0, c15, c0, 1	@ write diagnostic register
+#endif
 
 	mov	r5, lr			@ Store my Caller
 	mrc	p15, 0, r1, c0, c0, 0	@ r1 has Read Main ID Register (MIDR)
-- 
1.8.4

^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [U-Boot] [PATCH resend 2/2] imx: mx6: Enable ARM errata workaround for 845369
  2015-08-31  3:15 [U-Boot] [PATCH resend 1/2] ARM: Add workaround for Cortex-A9 errata 845369 Peng Fan
  2015-08-31  2:13 ` Peng Fan
@ 2015-08-31  3:15 ` Peng Fan
  1 sibling, 0 replies; 3+ messages in thread
From: Peng Fan @ 2015-08-31  3:15 UTC (permalink / raw)
  To: u-boot

From: Nitin Garg <nitin.garg@freescale.com>

Since MX6 is Cortex-A9 r2p10, enable software workaround
for errata 845369.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
---

Original patch:
http://lists.denx.de/pipermail/u-boot/2015-April/209725.html

 include/configs/mx6_common.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index ef4cb68..3f1b6b9 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -22,6 +22,7 @@
 #define CONFIG_ARM_ERRATA_751472
 #define CONFIG_ARM_ERRATA_794072
 #define CONFIG_ARM_ERRATA_761320
+#define CONFIG_ARM_ERRATA_845369
 
 #ifndef CONFIG_SYS_L2CACHE_OFF
 #define CONFIG_SYS_L2_PL310
-- 
1.8.4

^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2015-08-31  3:15 UTC | newest]

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