[U-Boot] [PATCH] arm: socfpga: Add support for the Terasic DE-0 Atlas board

Marek Vasut
2015-08-31T22:23:49Z

On Monday, August 31, 2015 at 09:57:05 PM, dinguyen at opensource.altera.com wrote:
> From: Dinh Nguyen <dinguyen@opensource.altera.com>
>
> Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV
> based board. The board can boot from SD/MMC. Ethernet is a bit different
> because it has a KSZ9031 PHY, so for now, ethernet doesn't quite work yet,
> as a few patches are needed to support the PHY.

I thought we did support the KSZ9031 PHY. What's the problem ?

> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> ---
> Hi Marek,
>
> This patch is based on your u-boot-socfpga/wip/boards branch.

OK, that makes sense.

> Thanks,
> Dinh
> ---
> arch/arm/dts/Makefile | 1 +
> arch/arm/dts/socfpga_cyclone5_de0_sockit.dts | 61 +++
> arch/arm/mach-socfpga/Kconfig | 7 +
> board/terasic/de0/MAINTAINERS | 5 +
> board/terasic/de0/Makefile | 9 +

I think it might be clearer to rename it to de0-nano-soc, what do you think ?
What's the difference between de0-nano-soc and atlas btw ?

[...]

> diff --git a/configs/socfpga_de0_defconfig b/configs/socfpga_de0_defconfig
> new file mode 100644
> index 0000000..000f322
> --- /dev/null
> +++ b/configs/socfpga_de0_defconfig
> @@ -0,0 +1,21 @@
> +CONFIG_ARM=y
> +CONFIG_ARCH_SOCFPGA=y
> +CONFIG_TARGET_SOCFPGA_CYCLONE5=y
> +CONFIG_TARGET_SOCFPGA_TERASIC_DE0=y
> +CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_sockit"
> +CONFIG_SPL=y
> +# CONFIG_CMD_IMLS is not set
> +# CONFIG_CMD_FLASH is not set
> +CONFIG_OF_CONTROL=y
> +CONFIG_DM_ETH=y
> +CONFIG_NETDEVICES=y
> +CONFIG_ETH_DESIGNWARE=y
> +CONFIG_DM_GPIO=y
> +CONFIG_DWAPB_GPIO=y
> +CONFIG_SPL_DM=y
> +CONFIG_SPL_MMC_SUPPORT=y
> +CONFIG_DM_SEQ_ALIAS=y

I think you don't need the DM_SEQ_ALIAS, it's needed only for QSPI
to enforce the SPI NOR ordering.

> +CONFIG_SPL_SIMPLE_BUS=y
> +CONFIG_SPL_STACK_R=y
> +CONFIG_SPL_STACK_R_ADDR=0x00800000
> +CONFIG_SYS_MALLOC_F_LEN=0x2000
> diff --git a/include/configs/socfpga_de0.h b/include/configs/socfpga_de0.h
> new file mode 100644
> index 0000000..47e18ba
> --- /dev/null
> +++ b/include/configs/socfpga_de0.h
> @@ -0,0 +1,88 @@
> +/*
> + * Copyright (C) 2015 Marek Vasut <marex@denx.de>
> + *
> + * SPDX-License-Identifier: GPL-2.0+
> + */
> +#ifndef __CONFIG_TERASIC_DE0_H__
> +#define __CONFIG_TERASIC_DE0_H__
> +
> +#include <asm/arch/socfpga_base_addrs.h>
> +
> +/* U-Boot Commands */
> +#define CONFIG_SYS_NO_FLASH
> +#define CONFIG_DOS_PARTITION
> +#define CONFIG_FAT_WRITE
> +#define CONFIG_HW_WATCHDOG
> +
> +#define CONFIG_CMD_ASKENV
> +#define CONFIG_CMD_BOOTZ
> +#define CONFIG_CMD_CACHE
> +#define CONFIG_CMD_DFU
> +#define CONFIG_CMD_DHCP
> +#define CONFIG_CMD_EXT4
> +#define CONFIG_CMD_EXT4_WRITE
> +#define CONFIG_CMD_FAT
> +#define CONFIG_CMD_FS_GENERIC
> +#define CONFIG_CMD_GPIO
> +#define CONFIG_CMD_GREPENV
> +#define CONFIG_CMD_MII
> +#define CONFIG_CMD_MMC
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_USB
> +#define CONFIG_CMD_USB_MASS_STORAGE
> +
> +/* Memory configurations */
> +#define PHYS_SDRAM_1_SIZE 0x40000000 /* 1GiB */
> +
> +/* Booting Linux */
> +#define CONFIG_BOOTDELAY 3
> +#define CONFIG_BOOTFILE "fitImage"
> +#define CONFIG_BOOTARGS "console=ttyS0,"
__stringify(CONFIG_BAUDRATE)
> +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> +#define CONFIG_BOOTCOMMAND "run ramboot"
> +#else
> +#define CONFIG_BOOTCOMMAND "run mmcload; run mmcboot"
> +#endif
> +#define CONFIG_LOADADDR 0x01000000
> +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
> +
> +/* Ethernet on SoC (EMAC) */
> +#if defined(CONFIG_CMD_NET)
> +
> +/* PHY */
> +#define CONFIG_PHY_MICREL
> +#define CONFIG_PHY_MICREL_KSZ9031
> +
> +#endif
> +
> +/* USB */
> +#ifdef CONFIG_CMD_USB
> +#define CONFIG_USB_DWC2_REG_ADDR SOCFPGA_USB1_ADDRESS
> +#endif
> +#define CONFIG_G_DNL_MANUFACTURER "Terasic"
> +
> +/* Extra Environment */
> +#define CONFIG_HOSTNAME socfpga_cyclone5

socfpga_d0_nano_soc might be better ;-)

> +
> +#define CONFIG_EXTRA_ENV_SETTINGS \
> + "verify=n\0" \

What's this "verify" variable for ?

> + "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
> + "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \
> + "bootm ${loadaddr} - ${fdt_addr}\0" \
> + "bootimage=zImage\0" \
> + "fdt_addr=100\0" \
> + "fdtimage=socfpga.dtb\0" \
> + "fsloadcmd=ext2load\0" \
> + "bootm ${loadaddr} - ${fdt_addr}\0" \
> + "mmcroot=/dev/mmcblk0p2\0" \
> + "mmcboot=setenv bootargs " CONFIG_BOOTARGS \
> + " root=${mmcroot} rw rootwait;" \
> + "bootz ${loadaddr} - ${fdt_addr}\0" \
> + "mmcload=mmc rescan;" \
> + "load mmc 0:1 ${loadaddr} ${bootimage};" \
> + "load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
> +
> +/* The rest of the configuration is shared */
> +#include <configs/socfpga_common.h>
> +
> +#endif /* __CONFIG_TERASIC_DE0_H__ */