From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Tue, 1 Sep 2015 11:01:55 +0200
Subject: [U-Boot] [PATCH] spi: cadence_qspi: Ensure spi_calibration is
	run when sclk change
In-Reply-To: <1441097207-2162-1-git-send-email-clsee@altera.com>
References: <1441097207-2162-1-git-send-email-clsee@altera.com>
Message-ID: <201509011101.55689.marex@denx.de>
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To: u-boot@lists.denx.de

On Tuesday, September 01, 2015 at 10:46:47 AM, Chin Liang See wrote:
> Ensuring spi_calibration is run when there is a change of sclk
> frequency. This will ensure the qspi flash access works for high
> sclk frequency
> 
> Signed-off-by: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> Cc: Marek Vasut <marex@denx.de>
> Cc: Stefan Roese <sr@denx.de>
> Cc: Vikas Manocha <vikas.manocha@st.com>
> Cc: Jagannadh Teki <jteki@openedev.com>
> Cc: Pavel Machek <pavel@denx.de>
> ---
>  drivers/spi/cadence_qspi.c |    3 +++
>  1 files changed, 3 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index 34a0f46..512bf2d 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -128,6 +128,9 @@ static int cadence_spi_set_speed(struct udevice *bus,
> uint hz)
> 
>  	cadence_spi_write_speed(bus, hz);
> 
> +	/* to ensure spi_calibration is run when SCLK frequency change */
> +	plat->max_hz = hz;
> +

This looks like a hack, doesn't this change just subvert the condition
below to enforce the calibration ?

>  	/* Calibration required for different SCLK speed or chip select */
>  	if (priv->qspi_calibrated_hz != plat->max_hz ||
>  	    priv->qspi_calibrated_cs != spi_chip_select(bus)) {

Best regards,
Marek Vasut