From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Mon, 7 Sep 2015 11:31:01 +0200
Subject: [U-Boot] [PATCH v2 4/8] nios2: enlarge the code relocation range
In-Reply-To: <55ECECC2.70304@wytron.com.tw>
References: <1441336526-23505-1-git-send-email-thomas@wytron.com.tw>
 <201509070253.31192.marex@denx.de> <55ECECC2.70304@wytron.com.tw>
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On Monday, September 07, 2015 at 03:47:46 AM, Thomas Chou wrote:
> Hi Marek,

Hi!

> On 09/07/2015 08:53 AM, Marek Vasut wrote:
> > Where did that 64KB figure come from ? :O
> 
> This is estimated from 41KB of the SPL of socfpga. The code density of
> nios2 is worse than ARM.
> 
> > I assume the simple loader is just a copy loop, huh ? And you synthesise
> > a small RAM or ROM into the FPGA and point NIOS to boot from that, right?
> 
> Right. It is hidden from the user in qsys. You will need to dig into the
> code to find out. The EPCS boot copier is coded in nios2 ASM.

Oh, I see.

> > What about U-Boot TPL, can that cook the loader ? (yes, I'd like to be as
> > independent of the external code as possible).
> 
> I'd like to be independent of the external code, too. In the past, I
> have my own SPI core (now the oc_tiny_spi) to control EPCS, which is
> actually SPI flash, and my own boot copier with/out decompression.
> 
> It is possible to add an TPL support for nios2 EPCS. If someone want to
> work on it.. :)

I'll keep this in mind, thanks :)

Best regards,
Marek Vasut