public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
* [U-Boot] [PATCH 2/4] spi: cadence_qspi: Fix fdt read of spi-max-frequency
@ 2015-09-08  1:18 Chin Liang See
  2015-09-08 10:09 ` Jagan Teki
                   ` (2 more replies)
  0 siblings, 3 replies; 12+ messages in thread
From: Chin Liang See @ 2015-09-08  1:18 UTC (permalink / raw)
  To: u-boot

Fix the fdt read for spi-max-frequency as it's contained
in the child node. Current state of code is always
returning default value.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
---
Changes for v2
- Add unsigned casting for plat->max_hz
---
 drivers/spi/cadence_qspi.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 23c88d5..8c0f7dd 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -296,10 +296,6 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
 	plat->regbase = (void *)data[0];
 	plat->ahbbase = (void *)data[2];
 
-	/* Use 500KHz as a suitable default */
-	plat->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency",
-				      500000);
-
 	/* All other paramters are embedded in the child node */
 	subnode = fdt_first_subnode(blob, node);
 	if (subnode < 0) {
@@ -307,6 +303,10 @@ static int cadence_spi_ofdata_to_platdata(struct udevice *bus)
 		return -ENODEV;
 	}
 
+	/* Use 500KHz as a suitable default */
+	plat->max_hz = (unsigned int)fdtdec_get_int(blob, subnode,
+						"spi-max-frequency", 500000);
+
 	/* Read other parameters from DT */
 	plat->page_size = fdtdec_get_int(blob, subnode, "page-size", 256);
 	plat->block_size = fdtdec_get_int(blob, subnode, "block-size", 16);
-- 
1.7.7.4

^ permalink raw reply related	[flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 1/4] spi: cadence_qspi: Ensure spi_calibration is run when sclk change
@ 2015-09-03 13:41 Chin Liang See
  2015-09-03 13:42 ` [U-Boot] [PATCH 2/4] spi: cadence_qspi: Fix fdt read of spi-max-frequency Chin Liang See
  0 siblings, 1 reply; 12+ messages in thread
From: Chin Liang See @ 2015-09-03 13:41 UTC (permalink / raw)
  To: u-boot

Ensuring spi_calibration is run when there is a change of sclk
frequency. This will ensure the qspi flash access works for high
sclk frequency

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
---
 drivers/spi/cadence_qspi.c |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index 34a0f46..300934e 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -37,7 +37,7 @@ static int cadence_spi_write_speed(struct udevice *bus, uint hz)
 }
 
 /* Calibration sequence to determine the read data capture delay register */
-static int spi_calibration(struct udevice *bus)
+static int spi_calibration(struct udevice *bus, uint hz)
 {
 	struct cadence_spi_platdata *plat = bus->platdata;
 	struct cadence_spi_priv *priv = dev_get_priv(bus);
@@ -64,7 +64,7 @@ static int spi_calibration(struct udevice *bus)
 	}
 
 	/* use back the intended clock and find low range */
-	cadence_spi_write_speed(bus, plat->max_hz);
+	cadence_spi_write_speed(bus, hz);
 	for (i = 0; i < CQSPI_READ_CAPTURE_MAX_DELAY; i++) {
 		/* Disable QSPI */
 		cadence_qspi_apb_controller_disable(base);
@@ -111,7 +111,7 @@ static int spi_calibration(struct udevice *bus)
 	      (range_hi + range_lo) / 2, range_lo, range_hi);
 
 	/* just to ensure we do once only when speed or chip select change */
-	priv->qspi_calibrated_hz = plat->max_hz;
+	priv->qspi_calibrated_hz = hz;
 	priv->qspi_calibrated_cs = spi_chip_select(bus);
 
 	return 0;
@@ -131,7 +131,7 @@ static int cadence_spi_set_speed(struct udevice *bus, uint hz)
 	/* Calibration required for different SCLK speed or chip select */
 	if (priv->qspi_calibrated_hz != plat->max_hz ||
 	    priv->qspi_calibrated_cs != spi_chip_select(bus)) {
-		err = spi_calibration(bus);
+		err = spi_calibration(bus, hz);
 		if (err)
 			return err;
 	}
-- 
1.7.7.4

^ permalink raw reply related	[flat|nested] 12+ messages in thread

end of thread, other threads:[~2015-09-10 11:41 UTC | newest]

Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-09-08  1:18 [U-Boot] [PATCH 2/4] spi: cadence_qspi: Fix fdt read of spi-max-frequency Chin Liang See
2015-09-08 10:09 ` Jagan Teki
2015-09-10  4:59   ` Chin Liang See
2015-09-08 11:19 ` Marek Vasut
2015-09-10  4:58   ` Chin Liang See
2015-09-10 11:41     ` Marek Vasut
2015-09-09  7:16 ` Pavel Machek
2015-09-10  5:00   ` Chin Liang See
  -- strict thread matches above, loose matches on Subject: below --
2015-09-03 13:41 [U-Boot] [PATCH 1/4] spi: cadence_qspi: Ensure spi_calibration is run when sclk change Chin Liang See
2015-09-03 13:42 ` [U-Boot] [PATCH 2/4] spi: cadence_qspi: Fix fdt read of spi-max-frequency Chin Liang See
2015-09-03 14:19   ` Marek Vasut
2015-09-08  1:16     ` Chin Liang See
2015-09-08 10:08       ` Marek Vasut

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox