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From: Wolfgang Denk <wd@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] Revert "imx: wdog: correct wcr register settings"
Date: Thu, 01 Oct 2015 22:11:43 +0200	[thread overview]
Message-ID: <20151001201143.865D8380905@gemini.denx.de> (raw)
In-Reply-To: <1443727970-10347-1-git-send-email-festevam@gmail.com>

Dear Fabio,

In message <1443727970-10347-1-git-send-email-festevam@gmail.com> you wrote:
> 
> Unlike i.MX, LS1021 uses big-endian ordering for the watchdog
> controller, which means we cannot use the little endian accessors.
...
> -	clrsetbits_le16(&wdog->wcr, 0, WCR_WDE);
> -
> +	writew(WCR_WDE, &wdog->wcr);

I'm sorry, but I fail to understand how writew() can be better than
another I/O accessor.  Neither of these has the capability to detect
the endianess of this specific register interface ?

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
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tain, and as far as they are certain, they do not refer  to  reality.
                                                   -- Albert Einstein

  parent reply	other threads:[~2015-10-01 20:11 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-01 19:32 [U-Boot] [PATCH] Revert "imx: wdog: correct wcr register settings" Fabio Estevam
2015-10-01 19:39 ` Sinan Akman
2015-10-01 19:45   ` Fabio Estevam
2015-10-01 19:50     ` Sinan Akman
2015-10-01 19:52       ` Fabio Estevam
2015-10-01 20:11 ` Wolfgang Denk [this message]
2015-10-01 20:19   ` Fabio Estevam
2015-10-01 20:50     ` Wolfgang Denk
2015-10-01 23:11       ` Fabio Estevam
2015-10-02  1:48         ` Sinan Akman
2015-10-02  4:30         ` Wolfgang Denk
2015-10-02 11:10           ` Fabio Estevam
2015-10-02 11:39             ` Fabio Estevam
2015-10-02 13:04               ` Sinan Akman
2015-10-02 13:29                 ` Fabio Estevam

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