From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Mon, 12 Oct 2015 15:46:13 +0200
Subject: [U-Boot] [PATCH v4] nios2: convert dma_alloc_coherent to use
	malloc_cache_aligned
In-Reply-To: <561BADA7.1050008@wytron.com.tw>
References: <1444013823-11909-1-git-send-email-thomas@wytron.com.tw>
 <201510121232.56484.marex@denx.de> <561BADA7.1050008@wytron.com.tw>
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On Monday, October 12, 2015 at 02:55:03 PM, Thomas Chou wrote:
> Hi Marek,

Hi Thomas,

> On 10/12/2015 06:32 PM, Marek Vasut wrote:
> > Wouldn't invalidate_dcache_range() be enough here ? You don't care about
> > the data in the newly allocated area at this point I guess -- either you
> > fill them in and then flush, for DMA from CPU to device OR you receive
> > data from device to CPU and then you invalidate this buffer again.
> 
> No. We cannot use invalidate cache here. This is related to cache design
> of nios2, kind of direct mapped cache.

Can you please expand on this ?

btw. I was thinking about this whole cache situation. Please don't get me wrong,
my intention is not to put way more work unto you and/or grind you about minor
details. I hope it doesn't look that way to you.

Best regards,
Marek Vasut