From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4] nios2: convert dma_alloc_coherent to use malloc_cache_aligned
Date: Sat, 17 Oct 2015 00:56:47 +0200 [thread overview]
Message-ID: <201510170056.47834.marex@denx.de> (raw)
In-Reply-To: <561C4DB1.9090502@wytron.com.tw>
On Tuesday, October 13, 2015 at 02:17:53 AM, Thomas Chou wrote:
> Hi Marek,
Hi!
> On 10/12/2015 09:46 PM, Marek Vasut wrote:
> > On Monday, October 12, 2015 at 02:55:03 PM, Thomas Chou wrote:
> >> Hi Marek,
> >
> > Hi Thomas,
> >
> >> On 10/12/2015 06:32 PM, Marek Vasut wrote:
> >>> Wouldn't invalidate_dcache_range() be enough here ? You don't care
> >>> about the data in the newly allocated area at this point I guess --
> >>> either you fill them in and then flush, for DMA from CPU to device OR
> >>> you receive data from device to CPU and then you invalidate this
> >>> buffer again.
> >>
> >> No. We cannot use invalidate cache here. This is related to cache design
> >> of nios2, kind of direct mapped cache.
> >
> > Can you please expand on this ?
>
> This is rather hardware depended.
>
> Please refer to page 7 about cache implementation on the "Nios II Core
> Implementation Detail" manual,
>
> https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/
> hb/nios2/n2cpu_nii51015.pdf
>
> And page 227, 8-44 about initd and initda instructions on the "Nios II
> Classic Processor Reference Guide",
>
> https://www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/
> hb/nios2/n2cpu_nii5v1.pdf
>
> The initda instruction might do the job.
I'd say that's the instruction we need, yep.
> But nios2 cpu with 4 bytes
> dcache line size does not support this instruction. So we don't
> implement the invalidate_dcache_range/all() in u-boot yet.
Where did you find this information ?
> Of course, we can add the invalidate cache ops if we can drop the
> support of nios2 cpu with 4 bytes dcache line size.
>
> > btw. I was thinking about this whole cache situation. Please don't get me
> > wrong, my intention is not to put way more work unto you and/or grind
> > you about minor details. I hope it doesn't look that way to you.
>
> No worries. It is just that I had very little free time last night to
> give more details. You are welcome.
Thanks!
Best regards,
Marek Vasut
next prev parent reply other threads:[~2015-10-16 22:56 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-05 2:57 [U-Boot] [PATCH] nios2: convert dma mapping to use dm cpu data Thomas Chou
2015-10-06 6:49 ` [U-Boot] [PATCH v2] nios2: convert dma_alloc_coherent to use memalign Thomas Chou
2015-10-08 21:43 ` Marek Vasut
2015-10-09 8:48 ` Thomas Chou
2015-10-09 11:35 ` Thomas Chou
2015-10-09 11:31 ` [U-Boot] [PATCH v3] " Thomas Chou
2015-10-09 14:49 ` Marek Vasut
2015-10-10 5:33 ` Thomas Chou
2015-10-10 18:19 ` Marek Vasut
2015-10-11 1:48 ` Thomas Chou
2015-10-11 12:15 ` Marek Vasut
2015-10-12 5:29 ` [U-Boot] [PATCH v4] nios2: convert dma_alloc_coherent to use malloc_cache_aligned Thomas Chou
2015-10-12 10:32 ` Marek Vasut
2015-10-12 12:55 ` Thomas Chou
2015-10-12 13:46 ` Marek Vasut
2015-10-13 0:17 ` Thomas Chou
2015-10-14 1:48 ` Thomas Chou
2015-10-16 22:53 ` Marek Vasut
2015-10-16 22:56 ` Marek Vasut [this message]
2015-10-17 2:59 ` Thomas Chou
2015-10-17 11:52 ` Marek Vasut
2015-10-19 5:52 ` Albert ARIBAUD
2015-10-19 8:18 ` Thomas Chou
2015-10-19 8:27 ` Albert ARIBAUD
2015-10-14 1:42 ` [U-Boot] [PATCH v5] " Thomas Chou
2015-10-16 8:29 ` [U-Boot] [PATCH v6] " Thomas Chou
2015-10-16 22:58 ` Marek Vasut
2015-10-18 23:46 ` Thomas Chou
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