From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Sat, 17 Oct 2015 01:00:05 +0200
Subject: [U-Boot] [PATCH v3] nios2: convert cache flush to use dm cpu
	data
In-Reply-To: <1444786719-31736-1-git-send-email-thomas@wytron.com.tw>
References: <1444119600-31999-1-git-send-email-thomas@wytron.com.t>
 <1444786719-31736-1-git-send-email-thomas@wytron.com.tw>
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To: u-boot@lists.denx.de

On Wednesday, October 14, 2015 at 03:38:39 AM, Thomas Chou wrote:
> Convert cache flush to use dm cpu data.
> 
> The original cache flush functions are written in assembly
> and use CONFIG_SYS_{I,D}CACHE_SIZE... macros. It is difficult
> to convert to use cache configuration in dm cpu data which is
> extracted from device tree.
> 
> The cacheflush.c of Linux nios2 arch uses cpuinfo structure,
> which is very close to our dm cpu data. So we copy and modify
> it to arch/nios2/lib/cache.c to replace the old cache.S.
> 
> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>

Hi!

[...]

> +static void __flush_dcache(unsigned long start, unsigned long end)
> +{
> +	unsigned long addr;
> +
> +	start &= ~(gd->arch.dcache_line_size - 1);
> +	end += (gd->arch.dcache_line_size - 1);
> +	end &= ~(gd->arch.dcache_line_size - 1);

I really don't think we should do this alignment here :-(

> +	for (addr = start; addr < end; addr += gd->arch.dcache_line_size) {
> +		__asm__ __volatile__ ("   flushda 0(%0)\n"
> +					: /* Outputs */
> +					: /* Inputs  */ "r"(addr)
> +					/* : No clobber */);
> +	}
> +}

[...]

Best regards,
Marek Vasut