From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Sat, 17 Oct 2015 13:52:10 +0200
Subject: [U-Boot] [PATCH v3] nios2: convert cache flush to use dm cpu
	data
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 <201510170100.05843.marex@denx.de> <5621F0C1.6070906@wytron.com.tw>
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To: u-boot@lists.denx.de

On Saturday, October 17, 2015 at 08:54:57 AM, Thomas Chou wrote:
> Hi Marek,

Hi!

> On 10/17/2015 07:00 AM, Marek Vasut wrote:
> >> +static void __flush_dcache(unsigned long start, unsigned long end)
> >> +{
> >> +	unsigned long addr;
> >> +
> >> +	start &= ~(gd->arch.dcache_line_size - 1);
> >> +	end += (gd->arch.dcache_line_size - 1);
> >> +	end &= ~(gd->arch.dcache_line_size - 1);
> > 
> > I really don't think we should do this alignment here :-(
> 
> The rounding to get flush range is necessary to keep it confirm to the
> interface defined in linux/Documentation/cachetlb.txt.
> 
> Removing the rounding and adding "range check and keep" is a violation
> to the common interface.
>
> You cannot agree to the common interface and, at the same time, insist
> on changing the definition by your own.

I agree we should strive for such an interface, but it's not in place yet
and there are many nasty places in U-Boot where such an interface is not
directly applicable yet. That's why we need some sort of detection of the
incorrect addresses used in cache ops, since if I am tracking down some
sort of DMA issues and I find that my cache code is hiding them, I'll be
really unhappy.

btw. I think most of the U-Boot code has been already fixed, so if you
add the cache range checks, they shouldn't trigger too much.

Best regards,
Marek Vasut