From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Sat, 17 Oct 2015 13:52:40 +0200
Subject: [U-Boot] [PATCH v4] nios2: convert dma_alloc_coherent to use
	malloc_cache_aligned
In-Reply-To: <5621B97A.5070107@wytron.com.tw>
References: <1444013823-11909-1-git-send-email-thomas@wytron.com.tw>
 <201510170056.47834.marex@denx.de> <5621B97A.5070107@wytron.com.tw>
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On Saturday, October 17, 2015 at 04:59:06 AM, Thomas Chou wrote:
> On 10/17/2015 06:56 AM, Marek Vasut wrote:
> >> But nios2 cpu with 4 bytes
> >> dcache line size does not support this instruction. So we don't
> >> implement the invalidate_dcache_range/all() in u-boot yet.
> > 
> > Where did you find this information ?
> 
> Please find it on the foot note of table 7, page 8 of "Nios II Core
> Implementation Detail" manual,
> 
> The 4-byte line data cache implementation substitutes the flushd
> instruction for the flushda
> instruction and triggers an unimplemented instruction exception for the
> initda instruction. The
> 16-byte and 32-byte line data cache implementations fully support the
> flushda and initda
> instructions.

I see, thank you for looking it up for me. This inconsistency is sad :-(

Best regards,
Marek Vasut