From mboxrd@z Thu Jan  1 00:00:00 1970
From: Albert ARIBAUD <albert.u.boot@aribaud.net>
Date: Mon, 19 Oct 2015 10:27:00 +0200
Subject: [U-Boot] [PATCH v4] nios2: convert dma_alloc_coherent to use
 malloc_cache_aligned
In-Reply-To: <5624A73E.4010705@wytron.com.tw>
References: <1444013823-11909-1-git-send-email-thomas@wytron.com.tw>
 <1444627783-15105-1-git-send-email-thomas@wytron.com.tw>
 <201510121232.56484.marex@denx.de> <561BADA7.1050008@wytron.com.tw>
 <20151019075225.1363f49f@lilith> <5624A73E.4010705@wytron.com.tw>
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Hello Thomas,

On Mon, 19 Oct 2015 16:18:06 +0800, Thomas Chou <thomas@wytron.com.tw>
wrote:
> Hi Albert,
> 
> On 10/19/2015 01:52 PM, Albert ARIBAUD wrote:
> > Not sure I'm getting this, so for my own education: what prevents from
> > invalidating the cache, or IOW, what would happen if it was invalidated
> > at this point rather than flushed?
> 
> This is a hardware limitation. The nios2 cpu with 4 bytes dcache line 
> size does not support the initda instruction, which is needed to 
> invalidate dcache.
> 
> Recently we added a check, if the nios2 cpu support initda instruction, 
> then we use invalidate_dcache, otherwise we use flush_dcache.

Now I understand. Thanks!

> Best regards,
> Thomas

Amicalement,
-- 
Albert.