From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] net: convert altera_tse to driver model and phylib
Date: Thu, 22 Oct 2015 03:53:53 +0200 [thread overview]
Message-ID: <201510220353.53509.marex@denx.de> (raw)
In-Reply-To: <56278E87.9000208@wytron.com.tw>
On Wednesday, October 21, 2015 at 03:09:27 PM, Thomas Chou wrote:
> Hi Marek,
Hi!
> On 10/19/2015 08:31 PM, Marek Vasut wrote:
> >> + /* decode regs, assume address-cells and size-cells are both one */
> >> + list = fdt_getprop(blob, node, "reg-names", &len);
> >> + if (!list)
> >> + return -ENOENT;
> >> + end = list + len;
> >> + cell = fdt_getprop(blob, node, "reg", &len);
> >> + if (!cell)
> >> + return -ENOENT;
> >> + idx = 0;
> >> + while (list < end) {
> >> + addr = fdt_translate_address((void *)blob,
> >> + node, cell + idx);
> >> + size = fdt_addr_to_cpu(cell[idx + 1]);
> >> + base = ioremap(addr, size);
> >> + len = strlen(list);
> >> + if (strcmp(list, "control_port") == 0)
> >> + priv->mac_dev = base;
> >
> > fdtdec_get_addr() won't do here?
>
> There are multiple "reg" tuples, and need to match "reg-names". That's
> beyond fdtdec_get_addr().
>
> tse_mac: ethernet at 0x4000 {
> compatible = "altr,tse-1.0";
> reg = <0x00004000 0x00000400>,
> <0x00004400 0x00000040>,
> <0x00004800 0x00000040>,
> <0x00002000 0x00002000>;
> reg-names = "control_port", "rx_csr", "tx_csr", "s1";
>
> Thanks a lot for your reviews.
Gotcha, thanks!
Best regards,
Marek Vasut
next prev parent reply other threads:[~2015-10-22 1:53 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-19 2:36 [U-Boot] [PATCH] net: convert altera_tse to driver model and phylib Thomas Chou
2015-10-19 12:31 ` Marek Vasut
2015-10-21 13:09 ` Thomas Chou
2015-10-22 1:53 ` Marek Vasut [this message]
2015-10-21 13:05 ` [U-Boot] [PATCH v2] " Thomas Chou
2015-10-22 1:59 ` Marek Vasut
2015-10-22 2:15 ` Simon Glass
2015-10-22 3:06 ` Thomas Chou
2015-10-22 7:35 ` [U-Boot] [PATCH v3] " Thomas Chou
2015-10-23 0:21 ` Thomas Chou
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