* [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02
@ 2015-09-19 10:56 Lokesh Vutla
2015-09-19 10:56 ` [U-Boot] [PATCH 01/19] ARM: k2g: Add support for CPU detection Lokesh Vutla
` (18 more replies)
0 siblings, 19 replies; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
This 66AK2G02 is a high performance, highly integrated device based on
TI KeyStone II Multicore SoC architecture. This device is composed of
single core Cortex-A15 and one DSP, built to meet the processing and
system level integration needs of industrial communications and control,
automotive and performance audio applications.
This series adds support for 66AK2G02 device with OF_CONTROL and DM
support.
Boot tested on k2g-evm.
Verified UART and SD boot modes.
This series is based on top of Kestone2 DT migration pach series:
https://www.mail-archive.com/u-boot%40lists.denx.de/msg186444.html
Lokesh Vutla (5):
ARM: k2g: Add support for CPU detection
ARM: k2g: Add kconfig support
ARM: k2g: Enable SPI flash
ARM: dts: k2g: Add DT support
ARM: k2g: Add config file
Mugunthan V N (2):
driver: net: keystone_net: fix phy mode configuration
driver: net: keystone_net: removing unused code
Roger Quadros (1):
ARM: k2g: add SD card and eMMC support
Vitaly Andrianov (11):
ARM: k2g: Add pll data
ARM: k2g: Add clock information
ARM: k2g: Add PSC info
ARM: k2g: Add ddr3 info
ARM: k2g: Add support for pin mux configuration
ARM: k2g: Add pin mux data
ARM: k2g: Correct base addresses
ARM: k2g: update keystone nav rx queue numbers
dma: keystone_nav: Fix linkram size
driver: net: keystone_net: add support for rgmii phy
ARM: k2g: Add Ethernet Support
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/k2g-evm.dts | 21 ++
arch/arm/dts/k2g.dtsi | 72 +++++
arch/arm/include/asm/ti-common/keystone_net.h | 11 +
arch/arm/mach-keystone/Kconfig | 3 +
arch/arm/mach-keystone/clock.c | 9 +
arch/arm/mach-keystone/cmd_mon.c | 2 +-
arch/arm/mach-keystone/ddr3.c | 12 +-
arch/arm/mach-keystone/include/mach/clock-k2g.h | 20 ++
arch/arm/mach-keystone/include/mach/clock.h | 10 +-
arch/arm/mach-keystone/include/mach/hardware-k2g.h | 74 +++++
arch/arm/mach-keystone/include/mach/hardware.h | 53 ++++
arch/arm/mach-keystone/include/mach/mmc_host_def.h | 22 ++
arch/arm/mach-keystone/include/mach/mux-k2g.h | 58 ++++
arch/arm/mach-keystone/init.c | 5 +
board/ti/ks2_evm/Kconfig | 13 +
board/ti/ks2_evm/MAINTAINERS | 2 +
board/ti/ks2_evm/Makefile | 2 +
board/ti/ks2_evm/board.c | 8 +-
board/ti/ks2_evm/board_k2e.c | 8 +
board/ti/ks2_evm/board_k2g.c | 117 ++++++++
board/ti/ks2_evm/board_k2hk.c | 4 +
board/ti/ks2_evm/board_k2l.c | 4 +
board/ti/ks2_evm/ddr3_k2g.c | 64 +++++
board/ti/ks2_evm/mux-k2g.h | 313 +++++++++++++++++++++
configs/k2g_evm_defconfig | 14 +
drivers/dma/keystone_nav.c | 2 +-
drivers/mmc/omap_hsmmc.c | 7 +-
drivers/net/keystone_net.c | 50 +++-
include/configs/k2g_evm.h | 59 ++++
include/configs/ti_armv7_keystone2.h | 11 +-
31 files changed, 1035 insertions(+), 18 deletions(-)
create mode 100644 arch/arm/dts/k2g-evm.dts
create mode 100644 arch/arm/dts/k2g.dtsi
create mode 100644 arch/arm/mach-keystone/include/mach/clock-k2g.h
create mode 100644 arch/arm/mach-keystone/include/mach/hardware-k2g.h
create mode 100644 arch/arm/mach-keystone/include/mach/mmc_host_def.h
create mode 100644 arch/arm/mach-keystone/include/mach/mux-k2g.h
create mode 100644 board/ti/ks2_evm/board_k2g.c
create mode 100644 board/ti/ks2_evm/ddr3_k2g.c
create mode 100644 board/ti/ks2_evm/mux-k2g.h
create mode 100644 configs/k2g_evm_defconfig
create mode 100644 include/configs/k2g_evm.h
--
2.1.4
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 01/19] ARM: k2g: Add support for CPU detection
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 02/19] ARM: k2g: Add kconfig support Lokesh Vutla
` (17 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
Adding CPU detection support for Keystone2 Galileo.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/mach-keystone/include/mach/hardware.h | 6 ++++++
arch/arm/mach-keystone/init.c | 3 +++
2 files changed, 9 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index f98a24e..cbb836c 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -247,6 +247,7 @@ typedef volatile unsigned int *dv_reg_p;
#define CPU_66AK2Hx 0xb981
#define CPU_66AK2Ex 0xb9a6
#define CPU_66AK2Lx 0xb9a7
+#define CPU_66AK2Gx 0xbb06
/* DEVSPEED register */
#define DEVSPEED_DEVSPEED_SHIFT 16
@@ -291,6 +292,11 @@ static inline u8 cpu_is_k2l(void)
return get_part_number() == CPU_66AK2Lx;
}
+static inline u8 cpu_is_k2g(void)
+{
+ return get_part_number() == CPU_66AK2Gx;
+}
+
static inline u8 cpu_revision(void)
{
u32 jtag_id = __raw_readl(KS2_JTAG_ID_REG);
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 678afb1..1157214 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -169,6 +169,9 @@ int print_cpuinfo(void)
case CPU_66AK2Ex:
puts("66AK2Ex SR");
break;
+ case CPU_66AK2Gx:
+ puts("66AK2Gx SR");
+ break;
default:
puts("Unknown\n");
}
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 02/19] ARM: k2g: Add kconfig support
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
2015-09-19 10:56 ` [U-Boot] [PATCH 01/19] ARM: k2g: Add support for CPU detection Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,02/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 03/19] ARM: k2g: Add pll data Lokesh Vutla
` (16 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
Add Kconfig support
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/mach-keystone/Kconfig | 3 +++
board/ti/ks2_evm/Kconfig | 13 +++++++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm/mach-keystone/Kconfig b/arch/arm/mach-keystone/Kconfig
index 67f1a33..e1962c7 100644
--- a/arch/arm/mach-keystone/Kconfig
+++ b/arch/arm/mach-keystone/Kconfig
@@ -13,6 +13,9 @@ config TARGET_K2E_EVM
config TARGET_K2L_EVM
bool "TI Keystone 2 Lamar EVM"
+config TARGET_K2G_EVM
+ bool "TI Keystone 2 Galileo EVM"
+
endchoice
config SYS_SOC
diff --git a/board/ti/ks2_evm/Kconfig b/board/ti/ks2_evm/Kconfig
index 384b175..c0568ec 100644
--- a/board/ti/ks2_evm/Kconfig
+++ b/board/ti/ks2_evm/Kconfig
@@ -36,3 +36,16 @@ config SYS_CONFIG_NAME
default "k2l_evm"
endif
+
+if TARGET_K2G_EVM
+
+config SYS_BOARD
+ default "ks2_evm"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "k2g_evm"
+
+endif
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 03/19] ARM: k2g: Add pll data
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
2015-09-19 10:56 ` [U-Boot] [PATCH 01/19] ARM: k2g: Add support for CPU detection Lokesh Vutla
2015-09-19 10:56 ` [U-Boot] [PATCH 02/19] ARM: k2g: Add kconfig support Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,03/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 04/19] ARM: k2g: Add clock information Lokesh Vutla
` (15 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
Add pll data for k2g
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/mach-keystone/clock.c | 5 ++
arch/arm/mach-keystone/include/mach/clock-k2g.h | 18 +++++++
arch/arm/mach-keystone/include/mach/clock.h | 6 +++
arch/arm/mach-keystone/include/mach/hardware.h | 2 +
board/ti/ks2_evm/Makefile | 1 +
board/ti/ks2_evm/board_k2g.c | 63 +++++++++++++++++++++++++
6 files changed, 95 insertions(+)
create mode 100644 arch/arm/mach-keystone/include/mach/clock-k2g.h
create mode 100644 board/ti/ks2_evm/board_k2g.c
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index fc3eadb..31ae936 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -31,6 +31,7 @@ const struct keystone_pll_regs keystone_pll_regs[] = {
[TETRIS_PLL] = {KS2_ARMPLLCTL0, KS2_ARMPLLCTL1},
[DDR3A_PLL] = {KS2_DDR3APLLCTL0, KS2_DDR3APLLCTL1},
[DDR3B_PLL] = {KS2_DDR3BPLLCTL0, KS2_DDR3BPLLCTL1},
+ [UART_PLL] = {KS2_UARTPLLCTL0, KS2_UARTPLLCTL1},
};
static void wait_for_completion(const struct pll_init_data *data)
@@ -309,6 +310,10 @@ static unsigned long pll_freq_get(int pll)
ret = external_clk[ddr3b_clk];
reg = KS2_DDR3BPLLCTL0;
break;
+ case UART_PLL:
+ ret = external_clk[uart_clk];
+ reg = KS2_UARTPLLCTL0;
+ break;
default:
return 0;
}
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2g.h b/arch/arm/mach-keystone/include/mach/clock-k2g.h
new file mode 100644
index 0000000..4d3f92e
--- /dev/null
+++ b/arch/arm/mach-keystone/include/mach/clock-k2g.h
@@ -0,0 +1,18 @@
+/*
+ * K2G: Clock data
+ *
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_CLOCK_K2G_H
+#define __ASM_ARCH_CLOCK_K2G_H
+
+#define PLLSET_CMD_LIST "<pa|arm|ddr3>"
+
+#define DEV_SUPPORTED_SPEEDS 0xfff
+#define ARM_SUPPORTED_SPEEDS 0xfff
+
+#endif
diff --git a/arch/arm/mach-keystone/include/mach/clock.h b/arch/arm/mach-keystone/include/mach/clock.h
index ddc5f8e..0a59fa0 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -24,8 +24,13 @@
#include <asm/arch/clock-k2l.h>
#endif
+#ifdef CONFIG_SOC_K2G
+#include <asm/arch/clock-k2g.h>
+#endif
+
#define CORE_PLL MAIN_PLL
#define DDR3_PLL DDR3A_PLL
+#define NSS_PLL PASS_PLL
#define CLK_LIST(CLK)\
CLK(0, core_pll_clk)\
@@ -75,6 +80,7 @@ enum {
PASS_PLL,
DDR3A_PLL,
DDR3B_PLL,
+ UART_PLL,
MAX_PLL_COUNT,
};
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index cbb836c..2c5167e 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -167,6 +167,8 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_DDR3BPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x36C)
#define KS2_ARMPLLCTL0 (KS2_DEVICE_STATE_CTRL_BASE + 0x370)
#define KS2_ARMPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x374)
+#define KS2_UARTPLLCTL0 (KS2_DEVICE_STATE_CTRL_BASE + 0x390)
+#define KS2_UARTPLLCTL1 (KS2_DEVICE_STATE_CTRL_BASE + 0x394)
#define KS2_PLL_CNTRL_BASE 0x02310000
#define KS2_CLOCK_BASE KS2_PLL_CNTRL_BASE
diff --git a/board/ti/ks2_evm/Makefile b/board/ti/ks2_evm/Makefile
index 071dbee..b7c5402 100644
--- a/board/ti/ks2_evm/Makefile
+++ b/board/ti/ks2_evm/Makefile
@@ -13,3 +13,4 @@ obj-$(CONFIG_K2E_EVM) += board_k2e.o
obj-$(CONFIG_K2E_EVM) += ddr3_k2e.o
obj-$(CONFIG_K2L_EVM) += board_k2l.o
obj-$(CONFIG_K2L_EVM) += ddr3_k2l.o
+obj-$(CONFIG_K2G_EVM) += board_k2g.o
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
new file mode 100644
index 0000000..6234baa
--- /dev/null
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -0,0 +1,63 @@
+/*
+ * K2G EVM : Board initialization
+ *
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+#include <common.h>
+#include <asm/arch/clock.h>
+
+static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
+static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
+static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
+static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};
+static struct pll_init_data ddr3_pll_config = {DDR3_PLL, 250, 3, 10};
+
+struct pll_init_data *get_pll_init_data(int pll)
+{
+ struct pll_init_data *data = NULL;
+
+ switch (pll) {
+ case MAIN_PLL:
+ data = &main_pll_config;
+ break;
+ case TETRIS_PLL:
+ data = &tetris_pll_config[speed];
+ break;
+ case NSS_PLL:
+ data = &nss_pll_config;
+ break;
+ case UART_PLL:
+ data = &uart_pll_config;
+ break;
+ case DDR3_PLL:
+ data = &ddr_pll_config;
+ break;
+ default:
+ data = NULL;
+ }
+
+ return data;
+}
+
+s16 divn_val[16] = {
+ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
+};
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+ init_plls();
+
+ return 0;
+}
+#endif
+
+#ifdef CONFIG_SPL_BUILD
+void spl_init_keystone_plls(void)
+{
+ init_plls();
+}
+#endif
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 04/19] ARM: k2g: Add clock information
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (2 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 03/19] ARM: k2g: Add pll data Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,04/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 05/19] ARM: k2g: Add PSC info Lokesh Vutla
` (14 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
Add clock information for Galileo
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/include/asm/ti-common/keystone_net.h | 4 ++++
arch/arm/mach-keystone/clock.c | 4 ++++
arch/arm/mach-keystone/cmd_mon.c | 2 +-
arch/arm/mach-keystone/include/mach/clock-k2g.h | 2 ++
arch/arm/mach-keystone/include/mach/clock.h | 4 +++-
board/ti/ks2_evm/board_k2g.c | 10 ++++++++++
include/configs/ti_armv7_keystone2.h | 11 ++++++++++-
7 files changed, 34 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/ti-common/keystone_net.h b/arch/arm/include/asm/ti-common/keystone_net.h
index 011c03c..4b5ea05 100644
--- a/arch/arm/include/asm/ti-common/keystone_net.h
+++ b/arch/arm/include/asm/ti-common/keystone_net.h
@@ -49,7 +49,11 @@
#define MAC_ID_BASE_ADDR CONFIG_KSNET_MAC_ID_BASE
/* MDIO module input frequency */
+#ifdef CONFIG_SOC_K2G
+#define EMAC_MDIO_BUS_FREQ (clk_get_rate(sys_clk0_3_clk))
+#else
#define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk))
+#endif
/* MDIO clock output frequency */
#define EMAC_MDIO_CLOCK_FREQ 2500000 /* 2.5 MHz */
diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index 31ae936..5d37ac3 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -356,6 +356,10 @@ unsigned long clk_get_rate(unsigned int clk)
if (cpu_is_k2hk())
freq = pll_freq_get(DDR3B_PLL);
break;
+ case uart_pll_clk:
+ if (cpu_is_k2g())
+ freq = pll_freq_get(UART_PLL);
+ break;
case sys_clk0_1_clk:
case sys_clk0_clk:
freq = pll_freq_get(CORE_PLL) / pll0div_read(1);
diff --git a/arch/arm/mach-keystone/cmd_mon.c b/arch/arm/mach-keystone/cmd_mon.c
index 73ceb83..a539d5d 100644
--- a/arch/arm/mach-keystone/cmd_mon.c
+++ b/arch/arm/mach-keystone/cmd_mon.c
@@ -37,7 +37,7 @@ static int do_mon_install(cmd_tbl_t *cmdtp, int flag, int argc,
if (argc < 2)
return CMD_RET_USAGE;
- freq = clk_get_rate(sys_clk0_6_clk);
+ freq = CONFIG_SYS_HZ_CLOCK;
addr = simple_strtoul(argv[1], NULL, 16);
diff --git a/arch/arm/mach-keystone/include/mach/clock-k2g.h b/arch/arm/mach-keystone/include/mach/clock-k2g.h
index 4d3f92e..214c1d3 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2g.h
@@ -15,4 +15,6 @@
#define DEV_SUPPORTED_SPEEDS 0xfff
#define ARM_SUPPORTED_SPEEDS 0xfff
+#define KS2_CLK1_6 sys_clk0_6_clk
+
#endif
diff --git a/arch/arm/mach-keystone/include/mach/clock.h b/arch/arm/mach-keystone/include/mach/clock.h
index 0a59fa0..05c2a76 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -53,7 +53,8 @@
CLK(17, sys_clk1_6_clk)\
CLK(18, sys_clk1_12_clk)\
CLK(19, sys_clk2_clk)\
- CLK(20, sys_clk3_clk)
+ CLK(20, sys_clk3_clk)\
+ CLK(21, uart_pll_clk)
#include <asm/types.h>
@@ -91,6 +92,7 @@ enum ext_clk_e {
tetris_clk,
ddr3a_clk,
ddr3b_clk,
+ uart_clk,
ext_clk_count /* number of external clocks */
};
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 6234baa..2d4602f 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -9,6 +9,16 @@
#include <common.h>
#include <asm/arch/clock.h>
+#define SYS_CLK 24000000
+
+unsigned int external_clk[ext_clk_count] = {
+ [sys_clk] = SYS_CLK,
+ [pa_clk] = SYS_CLK,
+ [tetris_clk] = SYS_CLK,
+ [ddr3a_clk] = SYS_CLK,
+ [uart_clk] = SYS_CLK,
+};
+
static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 1830760..ed86561 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -68,9 +68,14 @@
#endif
#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
-#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
#define CONFIG_CONS_INDEX 1
+#ifndef CONFIG_SOC_K2G
+#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
+#else
+#define CONFIG_SYS_NS16550_CLK clk_get_rate(uart_pll_clk) / 2
+#endif
+
/* SPI Configuration */
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_DAVINCI_SPI
@@ -302,6 +307,10 @@
/* we may include files below only after all above definitions */
#include <asm/arch/hardware.h>
#include <asm/arch/clock.h>
+#ifndef CONFIG_SOC_K2G
#define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6)
+#else
+#define CONFIG_SYS_HZ_CLOCK external_clk[sys_clk]
+#endif
#endif /* __CONFIG_KS2_EVM_H */
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 05/19] ARM: k2g: Add PSC info
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (3 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 04/19] ARM: k2g: Add clock information Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,05/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 06/19] ARM: k2g: Add ddr3 info Lokesh Vutla
` (13 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
Add psc information for k2g
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/mach-keystone/include/mach/hardware-k2g.h | 51 ++++++++++++++++++++++
arch/arm/mach-keystone/include/mach/hardware.h | 4 ++
2 files changed, 55 insertions(+)
create mode 100644 arch/arm/mach-keystone/include/mach/hardware-k2g.h
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
new file mode 100644
index 0000000..646ea85
--- /dev/null
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
@@ -0,0 +1,51 @@
+/*
+ * K2G: SoC definitions
+ *
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_HARDWARE_K2G_H
+#define __ASM_ARCH_HARDWARE_K2G_H
+
+#define KS2_NUM_DSPS 0
+
+/* Power and Sleep Controller (PSC) Domains */
+#define KS2_LPSC_ALWAYSON 0
+#define KS2_LPSC_PMMC 1
+#define KS2_LPSC_DEBUG 2
+#define KS2_LPSC_NSS 3
+#define KS2_LPSC_SA 4
+#define KS2_LPSC_TERANET 5
+#define KS2_LPSC_SYS_COMP 6
+#define KS2_LPSC_QSPI 7
+#define KS2_LPSC_MMC 8
+#define KS2_LPSC_GPMC 9
+#define KS2_LPSC_MLB 11
+#define KS2_LPSC_EHRPWM 12
+#define KS2_LPSC_EQEP 13
+#define KS2_LPSC_ECAP 14
+#define KS2_LPSC_MCASP 15
+#define KS2_LPSC_SR 16
+#define KS2_LPSC_MSMC 17
+#define KS2_LPSC_GEM 18
+#define KS2_LPSC_ARM 19
+#define KS2_LPSC_ASRC 20
+#define KS2_LPSC_ICSS 21
+#define KS2_LPSC_DSS 23
+#define KS2_LPSC_PCIE 24
+#define KS2_LPSC_USB_0 25
+#define KS2_LPSC_USB KS2_LPSC_USB_0
+#define KS2_LPSC_USB_1 26
+#define KS2_LPSC_DDR3 27
+#define KS2_LPSC_SPARE0_LPSC0 28
+#define KS2_LPSC_SPARE0_LPSC1 29
+#define KS2_LPSC_SPARE1_LPSC0 30
+#define KS2_LPSC_SPARE1_LPSC1 31
+
+#define KS2_LPSC_CPGMAC KS2_LPSC_NSS
+#define KS2_LPSC_CRYPTO KS2_LPSC_SA
+
+#endif /* __ASM_ARCH_HARDWARE_K2G_H */
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index 2c5167e..a99713a 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -270,6 +270,10 @@ typedef volatile unsigned int *dv_reg_p;
#include <asm/arch/hardware-k2l.h>
#endif
+#ifdef CONFIG_SOC_K2G
+#include <asm/arch/hardware-k2g.h>
+#endif
+
#ifndef __ASSEMBLY__
static inline u16 get_part_number(void)
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 06/19] ARM: k2g: Add ddr3 info
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (4 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 05/19] ARM: k2g: Add PSC info Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,06/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 07/19] ARM: k2g: Add support for pin mux configuration Lokesh Vutla
` (12 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
Add ddr3 related info
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/mach-keystone/ddr3.c | 12 ++++-
arch/arm/mach-keystone/include/mach/hardware.h | 4 ++
board/ti/ks2_evm/Makefile | 1 +
board/ti/ks2_evm/board.c | 3 +-
board/ti/ks2_evm/board_k2g.c | 6 +--
board/ti/ks2_evm/ddr3_k2g.c | 64 ++++++++++++++++++++++++++
6 files changed, 85 insertions(+), 5 deletions(-)
create mode 100644 board/ti/ks2_evm/ddr3_k2g.c
diff --git a/arch/arm/mach-keystone/ddr3.c b/arch/arm/mach-keystone/ddr3.c
index dfb27b5..34606f4 100644
--- a/arch/arm/mach-keystone/ddr3.c
+++ b/arch/arm/mach-keystone/ddr3.c
@@ -52,7 +52,8 @@ void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg)
__raw_writel(phy_cfg->dtpr2, base + KS2_DDRPHY_DTPR2_OFFSET);
__raw_writel(phy_cfg->mr0, base + KS2_DDRPHY_MR0_OFFSET);
__raw_writel(phy_cfg->mr1, base + KS2_DDRPHY_MR1_OFFSET);
- __raw_writel(phy_cfg->mr2, base + KS2_DDRPHY_MR2_OFFSET);
+ if (!cpu_is_k2g())
+ __raw_writel(phy_cfg->mr2, base + KS2_DDRPHY_MR2_OFFSET);
__raw_writel(phy_cfg->dtcr, base + KS2_DDRPHY_DTCR_OFFSET);
__raw_writel(phy_cfg->pgcr2, base + KS2_DDRPHY_PGCR2_OFFSET);
@@ -64,6 +65,15 @@ void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg)
while ((__raw_readl(base + KS2_DDRPHY_PGSR0_OFFSET) & 0x1) != 0x1)
;
+ /* Disable ECC for K2G */
+ if (cpu_is_k2g()) {
+ clrbits_le32(base + KS2_DDRPHY_DATX8_4_OFFSET, 0x1);
+ clrbits_le32(base + KS2_DDRPHY_DATX8_5_OFFSET, 0x1);
+ clrbits_le32(base + KS2_DDRPHY_DATX8_6_OFFSET, 0x1);
+ clrbits_le32(base + KS2_DDRPHY_DATX8_7_OFFSET, 0x1);
+ clrbits_le32(base + KS2_DDRPHY_DATX8_8_OFFSET, 0x1);
+ }
+
__raw_writel(phy_cfg->pir_v2, base + KS2_DDRPHY_PIR_OFFSET);
while ((__raw_readl(base + KS2_DDRPHY_PGSR0_OFFSET) & 0x1) != 0x1)
;
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index a99713a..2fd5b23 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -52,6 +52,10 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_DDRPHY_ZQ2CR1_OFFSET 0x1A4
#define KS2_DDRPHY_ZQ3CR1_OFFSET 0x1B4
+#define KS2_DDRPHY_DATX8_4_OFFSET 0x2C0
+#define KS2_DDRPHY_DATX8_5_OFFSET 0x300
+#define KS2_DDRPHY_DATX8_6_OFFSET 0x340
+#define KS2_DDRPHY_DATX8_7_OFFSET 0x380
#define KS2_DDRPHY_DATX8_8_OFFSET 0x3C0
#define IODDRM_MASK 0x00000180
diff --git a/board/ti/ks2_evm/Makefile b/board/ti/ks2_evm/Makefile
index b7c5402..d60496e 100644
--- a/board/ti/ks2_evm/Makefile
+++ b/board/ti/ks2_evm/Makefile
@@ -14,3 +14,4 @@ obj-$(CONFIG_K2E_EVM) += ddr3_k2e.o
obj-$(CONFIG_K2L_EVM) += board_k2l.o
obj-$(CONFIG_K2L_EVM) += ddr3_k2l.o
obj-$(CONFIG_K2G_EVM) += board_k2g.o
+obj-$(CONFIG_K2G_EVM) += ddr3_k2g.o
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 859a260..73c13fc 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -42,7 +42,8 @@ int dram_init(void)
gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
CONFIG_MAX_RAM_BANK_SIZE);
aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs);
- ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
+ if (ddr3_size)
+ ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size);
return 0;
}
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 2d4602f..81cef70 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -23,7 +23,7 @@ static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
static struct pll_init_data nss_pll_config = {NSS_PLL, 250, 3, 2};
-static struct pll_init_data ddr3_pll_config = {DDR3_PLL, 250, 3, 10};
+static struct pll_init_data ddr3_pll_config = {DDR3A_PLL, 250, 3, 10};
struct pll_init_data *get_pll_init_data(int pll)
{
@@ -34,7 +34,7 @@ struct pll_init_data *get_pll_init_data(int pll)
data = &main_pll_config;
break;
case TETRIS_PLL:
- data = &tetris_pll_config[speed];
+ data = &tetris_pll_config;
break;
case NSS_PLL:
data = &nss_pll_config;
@@ -43,7 +43,7 @@ struct pll_init_data *get_pll_init_data(int pll)
data = &uart_pll_config;
break;
case DDR3_PLL:
- data = &ddr_pll_config;
+ data = &ddr3_pll_config;
break;
default:
data = NULL;
diff --git a/board/ti/ks2_evm/ddr3_k2g.c b/board/ti/ks2_evm/ddr3_k2g.c
new file mode 100644
index 0000000..344961d
--- /dev/null
+++ b/board/ti/ks2_evm/ddr3_k2g.c
@@ -0,0 +1,64 @@
+/*
+ * K2G: DDR3 initialization
+ *
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include "ddr3_cfg.h"
+#include <asm/arch/ddr3.h>
+
+struct ddr3_phy_config ddr3phy_800_2g = {
+ .pllcr = 0x000DC000ul,
+ .pgcr1_mask = (IODDRM_MASK | ZCKSEL_MASK),
+ .pgcr1_val = ((1 << 2) | (1 << 7) | (1 << 23)),
+ .ptr0 = 0x42C21590ul,
+ .ptr1 = 0xD05612C0ul,
+ .ptr2 = 0,
+ .ptr3 = 0x06C30D40ul,
+ .ptr4 = 0x06413880ul,
+ .dcr_mask = (PDQ_MASK | MPRDQ_MASK | BYTEMASK_MASK),
+ .dcr_val = ((1 << 10)),
+ .dtpr0 = 0x550F6644ul,
+ .dtpr1 = 0x328341E0ul,
+ .dtpr2 = 0x50022A00ul,
+ .mr0 = 0x00001430ul,
+ .mr1 = 0x00000006ul,
+ .mr2 = 0x00000018ul,
+ .dtcr = 0x710035C7ul,
+ .pgcr2 = 0x00F03D09ul,
+ .zq0cr1 = 0x0001005Dul,
+ .zq1cr1 = 0x0001005Bul,
+ .zq2cr1 = 0x0001005Bul,
+ .pir_v1 = 0x00000033ul,
+ .pir_v2 = 0x00000F81ul,
+};
+
+struct ddr3_emif_config ddr3_800_2g = {
+ .sdcfg = 0x62005662ul,
+ .sdtim1 = 0x0A385033ul,
+ .sdtim2 = 0x00001CA5ul,
+ .sdtim3 = 0x21ADFF32ul,
+ .sdtim4 = 0x533F067Ful,
+ .zqcfg = 0x70073200ul,
+ .sdrfc = 0x00000C34ul,
+};
+
+u32 ddr3_init(void)
+{
+ /* Reset DDR3 PHY after PLL enabled */
+ ddr3_reset_ddrphy();
+
+ ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_800_2g);
+ ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_800_2g);
+
+ return 0;
+}
+
+inline int ddr3_get_size(void)
+{
+ return 2;
+}
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 07/19] ARM: k2g: Add support for pin mux configuration
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (5 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 06/19] ARM: k2g: Add ddr3 info Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 08/19] ARM: k2g: Add pin mux data Lokesh Vutla
` (11 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
Add api for configuring pin mux.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/mach-keystone/include/mach/mux-k2g.h | 58 +++++++++++++++++++++++++++
1 file changed, 58 insertions(+)
create mode 100644 arch/arm/mach-keystone/include/mach/mux-k2g.h
diff --git a/arch/arm/mach-keystone/include/mach/mux-k2g.h b/arch/arm/mach-keystone/include/mach/mux-k2g.h
new file mode 100644
index 0000000..6167d2c
--- /dev/null
+++ b/arch/arm/mach-keystone/include/mach/mux-k2g.h
@@ -0,0 +1,58 @@
+/*
+ * K2G: Pinmux configuration
+ *
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __ASM_ARCH_MUX_K2G_H
+#define __ASM_ARCH_MUX_K2G_H
+
+#include <common.h>
+#include <asm/io.h>
+
+#define K2G_PADCFG_REG (KS2_DEVICE_STATE_CTRL_BASE + 0x1000)
+
+/*
+ * 20:19 - buffer class RW fixed
+ * 18 - rxactive (Input enabled for the pad ) 0 - Di; 1 - En;
+ * 17 - pulltypesel (0 - PULLDOWN; 1 - PULLUP);
+ * 16 - pulluden (0 - PULLUP/DOWN EN; 1 - DI);
+ * 3:0 - muxmode (available modes 0:5)
+ */
+
+#define PIN_IEN (1 << 18) /* pin input enabled */
+#define PIN_PDIS (1 << 16) /* pull up/down disabled */
+#define PIN_PTU (1 << 17) /* pull up */
+#define PIN_PTD (0 << 17) /* pull down */
+
+#define MODE(m) ((m) & 0x7)
+#define MAX_PIN_N 260
+
+#define MUX_CFG(value, index) \
+ __raw_writel(\
+ (value) | \
+ (__raw_readl(K2G_PADCFG_REG + (index << 2)) & \
+ (0x3 << 19)),\
+ (K2G_PADCFG_REG + (index << 2))\
+ );
+
+struct pin_cfg {
+ int reg_inx;
+ u32 val;
+};
+
+static inline void configure_pin_mux(struct pin_cfg *pin_mux)
+{
+ if (!pin_mux)
+ return;
+
+ while ((pin_mux->reg_inx >= 0) && (pin_mux->reg_inx < MAX_PIN_N)) {
+ MUX_CFG(pin_mux->val, pin_mux->reg_inx);
+ pin_mux++;
+ }
+}
+
+#endif /* __ASM_ARCH_MUX_K2G_H */
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 08/19] ARM: k2g: Add pin mux data
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (6 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 07/19] ARM: k2g: Add support for pin mux configuration Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,08/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 09/19] ARM: k2g: Correct base addresses Lokesh Vutla
` (10 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
Add pin mux data for k2g-evm
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
board/ti/ks2_evm/board_k2g.c | 3 +
board/ti/ks2_evm/mux-k2g.h | 313 +++++++++++++++++++++++++++++++++++++++++++
2 files changed, 316 insertions(+)
create mode 100644 board/ti/ks2_evm/mux-k2g.h
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 81cef70..3852138 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -8,6 +8,7 @@
*/
#include <common.h>
#include <asm/arch/clock.h>
+#include "mux-k2g.h"
#define SYS_CLK 24000000
@@ -61,6 +62,8 @@ int board_early_init_f(void)
{
init_plls();
+ k2g_mux_config();
+
return 0;
}
#endif
diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h
new file mode 100644
index 0000000..773f9b7
--- /dev/null
+++ b/board/ti/ks2_evm/mux-k2g.h
@@ -0,0 +1,313 @@
+/*
+ * K2G EVM: Pinmux configuration
+ *
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/mux-k2g.h>
+#include <asm/arch/hardware.h>
+
+struct pin_cfg k2g_evm_pin_cfg[] = {
+ /* GPMC */
+ { 0, MODE(0) }, /* GPMCAD0 */
+ { 1, MODE(0) }, /* GPMCAD1 */
+ { 2, MODE(0) }, /* GPMCAD2 */
+ { 3, MODE(0) }, /* GPMCAD3 */
+ { 4, MODE(0) }, /* GPMCAD4 */
+ { 5, MODE(0) }, /* GPMCAD5 */
+ { 6, MODE(0) }, /* GPMCAD6 */
+ { 7, MODE(0) }, /* GPMCAD7 */
+ { 8, MODE(0) }, /* GPMCAD8 */
+ { 9, MODE(0) }, /* GPMCAD9 */
+ { 10, MODE(0) }, /* GPMCAD10 */
+ { 11, MODE(0) }, /* GPMCAD11 */
+ { 12, MODE(0) }, /* GPMCAD12 */
+ { 13, MODE(0) }, /* GPMCAD13 */
+ { 14, MODE(0) }, /* GPMCAD14 */
+ { 15, MODE(0) }, /* GPMCAD15 */
+ { 17, MODE(0) }, /* GPMCADVNALE */
+ { 18, MODE(0) }, /* GPMCOENREN */
+ { 19, MODE(0) }, /* GPMCWEN */
+ { 20, MODE(0) }, /* GPMCBE0NCLE */
+ { 22, MODE(0) }, /* GPMCWAIT0 */
+ { 24, MODE(0) }, /* GPMCWPN */
+ { 26, MODE(0) }, /* GPMCCSN0 */
+
+ /* GPIOs */
+ { 16, MODE(3) | PIN_IEN }, /* GPIO0_16 - PRSNT1# */
+ { 21, MODE(3) | PIN_IEN }, /* GPIO0_21 - DC_BRD_DET */
+ { 82, MODE(3) | PIN_IEN }, /* GPIO0_82 - TPS_INT1 */
+ { 83, MODE(3) }, /* GPIO0_83 - TPS_SLEEP */
+ { 84, MODE(3) }, /* GPIO0_84 - SEL_HDMIn_GPIO */
+ { 87, MODE(3) }, /* GPIO0_87 - SD_LP2996A */
+ { 106, MODE(3) | PIN_IEN}, /* GPIO0_100 - SOC_INT */
+ { 201, MODE(3) | PIN_IEN}, /* GPIO1_26 - GPIO_EXP_INT */
+ { 202, MODE(3) }, /* GPIO1_27 - SEL_LCDn_GPIO */
+ { 203, MODE(3) | PIN_IEN}, /* GPIO1_28 - SOC_MLB_GPIO2 */
+ { 204, MODE(3) | PIN_IEN}, /* GPIO1_29 - SOC_PCIE_WAKEn */
+ { 205, MODE(3) | PIN_IEN}, /* GPIO1_30 - BMC_INT1 */
+ { 206, MODE(3) | PIN_IEN}, /* GPIO1_31 - HDMI_INTn*/
+ { 207, MODE(3) | PIN_IEN}, /* GPIO1_32 - CS2000_AUX_OUT */
+ { 208, MODE(3) | PIN_IEN}, /* GPIO1_33 - TEMP_INT */
+ { 209, MODE(3) | PIN_IEN}, /* GPIO1_34 - WLAN_IRQ */
+ { 216, MODE(3) }, /* GPIO1_41 - FLASH_HOLD */
+ { 217, MODE(3) | PIN_IEN}, /* GPIO1_42 - TOUCH_INTn */
+
+ /* MLB */
+ { 23, MODE(2) }, /* SOC_MLBCLK */
+ { 25, MODE(2) }, /* SOC_MLBSIG */
+ { 27, MODE(2) }, /* SOC_MLBDAT */
+
+ /* DSS */
+ { 30, MODE(0) }, /* SOC_DSSDATA23 */
+ { 31, MODE(0) }, /* SOC_DSSDATA22 */
+ { 32, MODE(0) }, /* SOC_DSSDATA21 */
+ { 33, MODE(0) }, /* SOC_DSSDATA20 */
+ { 34, MODE(0) }, /* SOC_DSSDATA19 */
+ { 35, MODE(0) }, /* SOC_DSSDATA18 */
+ { 36, MODE(0) }, /* SOC_DSSDATA17 */
+ { 37, MODE(0) }, /* SOC_DSSDATA16 */
+ { 38, MODE(0) }, /* SOC_DSSDATA15 */
+ { 39, MODE(0) }, /* SOC_DSSDATA14 */
+ { 40, MODE(0) }, /* SOC_DSSDATA13 */
+ { 41, MODE(0) }, /* SOC_DSSDATA12 */
+ { 42, MODE(0) }, /* SOC_DSSDATA11 */
+ { 43, MODE(0) }, /* SOC_DSSDATA10 */
+ { 44, MODE(0) }, /* SOC_DSSDATA9 */
+ { 45, MODE(0) }, /* SOC_DSSDATA8 */
+ { 46, MODE(0) }, /* SOC_DSSDATA7 */
+ { 47, MODE(0) }, /* SOC_DSSDATA6 */
+ { 48, MODE(0) }, /* SOC_DSSDATA5 */
+ { 49, MODE(0) }, /* SOC_DSSDATA4 */
+ { 50, MODE(0) }, /* SOC_DSSDATA3 */
+ { 51, MODE(0) }, /* SOC_DSSDATA2 */
+ { 52, MODE(0) }, /* SOC_DSSDATA1 */
+ { 53, MODE(0) }, /* SOC_DSSDATA0 */
+ { 54, MODE(0) }, /* SOC_DSSVSYNC */
+ { 55, MODE(0) }, /* SOC_DSSHSYNC */
+ { 56, MODE(0) }, /* SOC_DSSPCLK */
+ { 57, MODE(0) }, /* SOC_DSS_DE */
+ { 58, MODE(0) }, /* SOC_DSS_FID */
+ { 221, MODE(4) }, /* PWM0 - SOC_BACKLIGHT_PWM */
+
+ /* MMC1 */
+ { 59, MODE(0) }, /* SOC_MMC1_DAT7 */
+ { 60, MODE(0) }, /* SOC_MMC1_DAT6 */
+ { 61, MODE(0) }, /* SOC_MMC1_DAT5 */
+ { 62, MODE(0) }, /* SOC_MMC1_DAT4 */
+ { 63, MODE(0) }, /* SOC_MMC1_DAT3 */
+ { 64, MODE(0) }, /* SOC_MMC1_DAT2 */
+ { 65, MODE(0) }, /* SOC_MMC1_DAT1 */
+ { 66, MODE(0) }, /* SOC_MMC1_DAT0 */
+ { 67, MODE(0) }, /* SOC_MMC1_CLK */
+ { 68, MODE(0) }, /* SOC_MMC1_CMD */
+ { 69, MODE(0) }, /* MMC1SDCD TP125 */
+ { 70, MODE(0) }, /* SOC_MMC1_SDWP */
+ { 71, MODE(0) }, /* MMC1POW TP124 */
+
+ /* RGMII */
+ { 72, MODE(1) | PIN_IEN }, /* SOC_RGMII_RXCLK */
+ { 77, MODE(1) | PIN_IEN }, /* SOC_RGMII_RXD3 */
+ { 78, MODE(1) | PIN_IEN }, /* SOC_RGMII_RXD2 */
+ { 79, MODE(1) | PIN_IEN }, /* SOC_RGMII_RXD1 */
+ { 80, MODE(1) | PIN_IEN }, /* SOC_RGMII_RXD0 */
+ { 81, MODE(1) | PIN_IEN }, /* SOC_RGMII_RXCTL */
+ { 85, MODE(1) }, /* SOC_RGMII_TXCLK */
+ { 91, MODE(1) }, /* SOC_RGMII_TXD3 */
+ { 92, MODE(1) }, /* SOC_RGMII_TXD2 */
+ { 93, MODE(1) }, /* SOC_RGMII_TXD1 */
+ { 94, MODE(1) }, /* SOC_RGMII_TXD0 */
+ { 95, MODE(1) }, /* SOC_RGMII_TXCTL */
+ { 98, MODE(0) }, /* SOC_MDIO_DATA */
+ { 99, MODE(0) }, /* SOC_MDIO_CLK */
+
+ /* PWM */
+ { 73, MODE(4) }, /* SOC_EHRPWM3A */
+ { 74, MODE(4) }, /* SOC_EHRPWM3B */
+ { 75, MODE(4) }, /* SOC_EHRPWM3_SYNCI */
+ { 76, MODE(4) }, /* SOC_EHRPWM3_SYNCO */
+ { 96, MODE(4) }, /* SOC_EHRPWM_TRIPZONE_INPUT3 */
+ { 198, MODE(4) }, /* SOC_EHRPWM_TRIPZONE_INPUT4 */
+ { 199, MODE(4) }, /* SOC_EHRPWM4A */
+ { 200, MODE(4) }, /* SOC_EHRPWM4B */
+ { 218, MODE(4) }, /* SOC_EHRPWM_TRIPZONE_INPUT5 */
+ { 219, MODE(4) }, /* SOC_EHRPWM5A */
+ { 220, MODE(4) }, /* SOC_EHRPWM5B */
+ { 222, MODE(4) }, /* SOC_ECAP1_IN_PWM1_OUT */
+
+ /* SPI3 */
+ { 86, MODE(1) }, /* SOC_SPI3_SCS0 */
+ { 88, MODE(1) }, /* SOC_SPI3_CLK */
+ { 89, MODE(1) }, /* SOC_SPI3_MISO */
+ { 90, MODE(1) }, /* SOC_SPI3_MOSI */
+
+ /* CLK */
+ { 97, MODE(0) }, /* SMD - TP132 */
+
+ /* SPI0 */
+ { 100, MODE(0) }, /* SOC_SPI0_SCS0 */
+ { 101, MODE(0) }, /* SOC_SPI0_SCS1 */
+ { 102, MODE(0) }, /* SOC_SPI0_CLK */
+ { 103, MODE(0) }, /* SOC_SPI0_MISO */
+ { 104, MODE(0) }, /* SOC_SPI0_MOSI */
+
+ /* SPI1 NORFLASH */
+ { 105, MODE(0) }, /* SOC_SPI1_SCS0 */
+ { 107, MODE(0) }, /* SOC_SPI1_CLK */
+ { 108, MODE(0) }, /* SOC_SPI1_MISO */
+ { 109, MODE(0) }, /* SOC_SPI1_MOSI */
+
+ /* SPI2 */
+ { 110, MODE(0) }, /* SOC_SPI2_SCS0 */
+ { 111, MODE(1) }, /* SOC_HOUT */
+ { 112, MODE(0) }, /* SOC_SPI2_CLK */
+ { 113, MODE(0) }, /* SOC_SPI2_MISO */
+ { 114, MODE(0) }, /* SOC_SPI2_MOSI */
+
+ /* UART0 */
+ { 115, MODE(0) }, /* SOC_UART0_RXD */
+ { 116, MODE(0) }, /* SOC_UART0_TXD */
+ { 117, MODE(0) }, /* SOC_UART0_CTSn */
+ { 118, MODE(0) }, /* SOC_UART0_RTSn */
+
+ /* UART1 */
+ { 119, MODE(0) }, /* SOC_UART1_RXD */
+ { 120, MODE(0) }, /* SOC_UART1_TXD */
+ { 121, MODE(0) }, /* SOC_UART1_CTSn */
+ { 122, MODE(0) }, /* SOC_UART1_RTSn */
+
+ /* UART2 */
+ { 123, MODE(0) }, /* SOC_UART2_RXD */
+ { 124, MODE(0) }, /* SOC_UART2_TXD */
+ { 125, MODE(0) }, /* UART0_TXVR_EN */
+ { 126, MODE(4) }, /* SOC_CPTS_TS_COMP */
+
+ /* DCAN */
+ { 127, MODE(0) }, /* SOC_DCAN0_TX */
+ { 128, MODE(0) }, /* SOC_DCAN0_RX */
+ { 137, MODE(1) }, /* SOC_DCAN1_TX */
+ { 138, MODE(1) }, /* SOC_DCAN1_RX */
+
+ /* QSPI */
+ { 129, MODE(0) }, /* SOC_QSPI_CLK */
+ { 130, MODE(0) }, /* SOC_QSPI_RTCLK */
+ { 131, MODE(0) }, /* SOC_QSPI_D0 */
+ { 132, MODE(0) }, /* SOC_QSPI_D1 */
+ { 133, MODE(0) }, /* SOC_QSPI_D2 */
+ { 134, MODE(0) }, /* SOC_QSPI_D3 */
+ { 135, MODE(0) }, /* SOC_QSPI_CSN0 */
+ { 136, MODE(1) }, /* DNI <-> WLAN_SLOW_CLK */
+
+ /* MCASP2 */
+ { 139, MODE(3) }, /* SOC_MCASP2AXR0 - (GPIO0_108)SOC_LED0 */
+ { 140, MODE(4) }, /* SOC_MCASP2AXR1 */
+ { 141, MODE(4) }, /* SOC_MCASP2AXR2 */
+ { 142, MODE(4) }, /* SOC_MCASP2AXR3 */
+ { 143, MODE(4) }, /* SOC_MCASP2AXR4 */
+ { 144, MODE(4) }, /* SOC_MCASP2AXR5 */
+ { 145, MODE(4) }, /* SOC_McASP2ACLKR */
+ { 146, MODE(4) }, /* SOC_McASP2FSR */
+ { 147, MODE(4) }, /* SOC_McASP2AHCLKR */
+ { 148, MODE(3) }, /* GPIO0_117 - WLAN_TRANS_EN */
+ { 149, MODE(4) }, /* SOC_McASP2FSX */
+ { 150, MODE(4) }, /* SOC_McASP2AHCLKX */
+ { 151, MODE(4) }, /* SOC_McASP2ACLKX */
+
+ /* MCASP1 */
+ { 152, MODE(4) }, /* SOC_MCASP1ACLKR */
+ { 153, MODE(4) }, /* SOC_MCASP1FSR */
+ { 154, MODE(4) }, /* SOC_MCASP1AHCLKR */
+ { 155, MODE(4) }, /* SOC_MCASP1ACLKX */
+ { 156, MODE(4) }, /* SOC_MCASP1FSX */
+ { 157, MODE(4) }, /* SOC_MCASP1AHCLKX */
+ { 158, MODE(4) }, /* SOC_MCASP1AMUTE */
+ { 159, MODE(4) }, /* SOC_MCASP1AXR0 */
+ { 160, MODE(4) }, /* SOC_MCASP1AXR1 */
+ { 161, MODE(4) }, /* SOC_MCASP1AXR2 */
+ { 162, MODE(4) }, /* SOC_MCASP1AXR3 */
+ { 163, MODE(4) }, /* SOC_MCASP1AXR4 */
+ { 164, MODE(4) }, /* SOC_MCASP1AXR5 */
+ { 165, MODE(4) }, /* SOC_MCASP1AXR6 */
+ { 166, MODE(4) }, /* SOC_MCASP1AXR7 */
+ { 167, MODE(4) }, /* SOC_MCASP1AXR8 */
+ { 168, MODE(4) }, /* SOC_MCASP1AXR9 */
+
+ /* MCASP0 */
+ { 169, MODE(4) }, /* SOC_MCASP0AMUTE */
+ { 170, MODE(4) }, /* SOC_MCASP0ACLKR */
+ { 171, MODE(4) }, /* SOC_MCASP0FSR */
+ { 172, MODE(4) }, /* SOC_MCASP0AHCLKR */
+ { 173, MODE(4) }, /* SOC_MCASP0ACLKX */
+ { 174, MODE(4) }, /* SOC_MCASP0FSX */
+ { 175, MODE(4) }, /* SOC_MCASP0AHCLKX */
+ { 176, MODE(4) }, /* SOC_MCASP0AXR0 */
+ { 177, MODE(4) }, /* SOC_MCASP0AXR1 */
+ { 178, MODE(4) }, /* SOC_MCASP0AXR2 */
+ { 179, MODE(4) }, /* SOC_MCASP0AXR3 */
+ { 180, MODE(4) }, /* SOC_MCASP0AXR4 */
+ { 181, MODE(4) }, /* SOC_MCASP0AXR5 */
+ { 182, MODE(4) }, /* SOC_MCASP0AXR6 */
+ { 183, MODE(4) }, /* SOC_MCASP0AXR7 */
+ { 184, MODE(4) }, /* SOC_MCASP0AXR8 */
+ { 185, MODE(4) }, /* SOC_MCASP0AXR9 */
+ { 186, MODE(3) }, /* SOC_MCASP0AXR10 - (GPIO1_11)SOC_LED1 */
+ { 188, MODE(4) }, /* SOC_MCASP0AXR12 */
+ { 189, MODE(4) }, /* SOC_MCASP0AXR13 */
+ { 190, MODE(4) }, /* SOC_MCASP0AXR14 */
+ { 191, MODE(4) }, /* SOC_MCASP0AXR15 */
+
+ /* MMC0 */
+ { 192, MODE(2) }, /* SOC_MMC0_DAT3 */
+ { 193, MODE(2) }, /* SOC_MMC0_DAT2 */
+ { 194, MODE(2) }, /* SOC_MMC0_DAT1 */
+ { 195, MODE(2) }, /* SOC_MMC0_DAT0 */
+ { 196, MODE(2) }, /* SOC_MMC0_CLK */
+ { 197, MODE(2) }, /* SOC_MMC0_CMD */
+ { 187, MODE(2) }, /* SOC_MMC0_SDCD */
+
+ /* McBSP */
+ { 28, MODE(2) | PIN_IEN }, /* SOC_TIMI1 */
+ { 29, MODE(2) }, /* SOC_TIMO1 */
+ { 210, MODE(2) }, /* SOC_MCBSPDR */
+ { 211, MODE(2) }, /* SOC_MCBSPDX */
+ { 212, MODE(2) }, /* SOC_MCBSPFSX */
+ { 213, MODE(2) }, /* SOC_MCBSPCLKX */
+ { 214, MODE(2) }, /* SOC_MCBSPFSR */
+ { 215, MODE(2) }, /* SOC_MCBSPCLKR */
+
+ /* I2C */
+ { 223, MODE(0) }, /* SOC_I2C0_SCL */
+ { 224, MODE(0) }, /* SOC_I2C0_SDA */
+ { 225, MODE(0) }, /* SOC_I2C1_SCL */
+ { 226, MODE(0) }, /* SOC_I2C1_SDA */
+ { 227, MODE(0) }, /* SOC_I2C2_SCL */
+ { 228, MODE(0) }, /* SOC_I2C2_SDA */
+ { 229, MODE(0) }, /* NMIz */
+ { 230, MODE(0) }, /* LRESETz */
+ { 231, MODE(0) }, /* LRESETNMIENz */
+
+ { 235, MODE(0) },
+ { 236, MODE(0) },
+ { 237, MODE(0) },
+ { 238, MODE(0) },
+ { 239, MODE(0) },
+ { 240, MODE(0) },
+ { 241, MODE(0) },
+ { 242, MODE(0) },
+ { 243, MODE(0) },
+ { 244, MODE(0) },
+
+ { 258, MODE(0) }, /* USB0DRVVBUS */
+ { 259, MODE(0) }, /* USB1DRVVBUS */
+ { MAX_PIN_N, }
+};
+
+void k2g_mux_config(void)
+{
+ configure_pin_mux(k2g_evm_pin_cfg);
+}
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 09/19] ARM: k2g: Correct base addresses
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (7 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 08/19] ARM: k2g: Add pin mux data Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,09/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 10/19] ARM: k2g: update keystone nav rx queue numbers Lokesh Vutla
` (9 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
Coreect base addresses for SPI, Queue Manager, Ethernet, GPIO,
and MSMC segments.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/mach-keystone/include/mach/hardware-k2g.h | 23 ++++++++++++++++
arch/arm/mach-keystone/include/mach/hardware.h | 32 ++++++++++++++++++++++
arch/arm/mach-keystone/init.c | 2 ++
3 files changed, 57 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/hardware-k2g.h b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
index 646ea85..fa4162f 100644
--- a/arch/arm/mach-keystone/include/mach/hardware-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/hardware-k2g.h
@@ -48,4 +48,27 @@
#define KS2_LPSC_CPGMAC KS2_LPSC_NSS
#define KS2_LPSC_CRYPTO KS2_LPSC_SA
+/* SGMII SerDes */
+#define KS2_LANES_PER_SGMII_SERDES 4
+
+/* NETCP pktdma */
+#define KS2_NETCP_PDMA_CTRL_BASE 0x04010000
+#define KS2_NETCP_PDMA_TX_BASE 0x04011000
+#define KS2_NETCP_PDMA_TX_CH_NUM 21
+#define KS2_NETCP_PDMA_RX_BASE 0x04012000
+#define KS2_NETCP_PDMA_RX_CH_NUM 32
+#define KS2_NETCP_PDMA_SCHED_BASE 0x04010100
+#define KS2_NETCP_PDMA_RX_FLOW_BASE 0x04013000
+#define KS2_NETCP_PDMA_RX_FLOW_NUM 32
+#define KS2_NETCP_PDMA_TX_SND_QUEUE 5
+
+/* NETCP */
+#define KS2_NETCP_BASE 0x04000000
+
+#define K2G_GPIO0_BASE 0X02603000
+#define K2G_GPIO1_BASE 0X0260a000
+#define K2G_GPIO1_BANK2_BASE K2G_GPIO1_BASE + 0x38
+#define K2G_GPIO_DIR_OFFSET 0x0
+#define K2G_GPIO_SETDATA_OFFSET 0x8
+
#endif /* __ASM_ARCH_HARDWARE_K2G_H */
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index 2fd5b23..286c63a 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -147,6 +147,8 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_JTAG_ID_REG (KS2_DEVICE_STATE_CTRL_BASE + 0x18)
#define KS2_DEVSTAT (KS2_DEVICE_STATE_CTRL_BASE + 0x20)
#define KS2_DEVCFG (KS2_DEVICE_STATE_CTRL_BASE + 0x14c)
+#define KS2_ETHERNET_CFG (KS2_DEVICE_STATE_CTRL_BASE + 0xe20)
+#define KS2_ETHERNET_RGMII 2
/* PSC */
#define KS2_PSC_BASE 0x02350000
@@ -185,10 +187,17 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_RSTYPE_PLL_SOFT BIT(13)
/* SPI */
+#ifdef CONFIG_SOC_K2G
+#define KS2_SPI0_BASE 0x21805400
+#define KS2_SPI1_BASE 0x21805800
+#define KS2_SPI2_BASE 0x21805c00
+#define KS2_SPI3_BASE 0x21806000
+#else
#define KS2_SPI0_BASE 0x21000400
#define KS2_SPI1_BASE 0x21000600
#define KS2_SPI2_BASE 0x21000800
#define KS2_SPI_BASE KS2_SPI0_BASE
+#endif
/* AEMIF */
#define KS2_AEMIF_CNTRL_BASE 0x21000a00
@@ -200,10 +209,16 @@ typedef volatile unsigned int *dv_reg_p;
/* MSMC control */
#define KS2_MSMC_CTRL_BASE 0x0bc00000
#define KS2_MSMC_DATA_BASE 0x0c000000
+#ifndef CONFIG_SOC_K2G
#define KS2_MSMC_SEGMENT_TETRIS 8
#define KS2_MSMC_SEGMENT_NETCP 9
#define KS2_MSMC_SEGMENT_QM_PDSP 10
#define KS2_MSMC_SEGMENT_PCIE0 11
+#else
+#define KS2_MSMC_SEGMENT_TETRIS 1
+#define KS2_MSMC_SEGMENT_NETCP 4
+#define KS2_MSMC_SEGMENT_PCIE0 5
+#endif
/* MSMC segment size shift bits */
#define KS2_MSMC_SEG_SIZE_SHIFT 12
@@ -217,6 +232,22 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_MISC_CTRL (KS2_DEVICE_STATE_CTRL_BASE + 0xc7c)
/* Queue manager */
+#ifdef CONFIG_SOC_K2G
+#define KS2_QM_BASE_ADDRESS 0x040C0000
+#define KS2_QM_CONF_BASE 0x04040000
+#define KS2_QM_DESC_SETUP_BASE 0x04080000
+#define KS2_QM_STATUS_RAM_BASE 0x0 /* K2G doesn't have it */
+#define KS2_QM_INTD_CONF_BASE 0x0
+#define KS2_QM_PDSP1_CMD_BASE 0x0
+#define KS2_QM_PDSP1_CTRL_BASE 0x0
+#define KS2_QM_PDSP1_IRAM_BASE 0x0
+#define KS2_QM_MANAGER_QUEUES_BASE 0x040c0000
+#define KS2_QM_MANAGER_Q_PROXY_BASE 0x04040200
+#define KS2_QM_QUEUE_STATUS_BASE 0x04100000
+#define KS2_QM_LINK_RAM_BASE 0x04020000
+#define KS2_QM_REGION_NUM 8
+#define KS2_QM_QPOOL_NUM 112
+#else
#define KS2_QM_BASE_ADDRESS 0x23a80000
#define KS2_QM_CONF_BASE 0x02a02000
#define KS2_QM_DESC_SETUP_BASE 0x02a03000
@@ -231,6 +262,7 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_QM_LINK_RAM_BASE 0x00100000
#define KS2_QM_REGION_NUM 64
#define KS2_QM_QPOOL_NUM 4000
+#endif
/* USB */
#define KS2_USB_SS_BASE 0x02680000
diff --git a/arch/arm/mach-keystone/init.c b/arch/arm/mach-keystone/init.c
index 1157214..aadd10b 100644
--- a/arch/arm/mach-keystone/init.c
+++ b/arch/arm/mach-keystone/init.c
@@ -103,7 +103,9 @@ int arch_cpu_init(void)
msmc_share_all_segments(KS2_MSMC_SEGMENT_TETRIS);
msmc_share_all_segments(KS2_MSMC_SEGMENT_NETCP);
+#ifdef KS2_MSMC_SEGMENT_QM_PDSP
msmc_share_all_segments(KS2_MSMC_SEGMENT_QM_PDSP);
+#endif
msmc_share_all_segments(KS2_MSMC_SEGMENT_PCIE0);
/* Initialize the PCIe-0 to work as Root Complex */
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 10/19] ARM: k2g: update keystone nav rx queue numbers
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (8 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 09/19] ARM: k2g: Correct base addresses Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 11/19] driver: net: keystone_net: fix phy mode configuration Lokesh Vutla
` (8 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
update K2G nav rx queue number
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/mach-keystone/include/mach/hardware.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-keystone/include/mach/hardware.h b/arch/arm/mach-keystone/include/mach/hardware.h
index 286c63a..edebcd7 100644
--- a/arch/arm/mach-keystone/include/mach/hardware.h
+++ b/arch/arm/mach-keystone/include/mach/hardware.h
@@ -125,8 +125,13 @@ typedef volatile unsigned int *dv_reg_p;
#define KS2_EDMA_PARAM_1(x) (0x4020 + (4 * x))
/* NETCP pktdma */
+#ifdef CONFIG_SOC_K2G
+#define KS2_NETCP_PDMA_RX_FREE_QUEUE 113
+#define KS2_NETCP_PDMA_RX_RCV_QUEUE 114
+#else
#define KS2_NETCP_PDMA_RX_FREE_QUEUE 4001
#define KS2_NETCP_PDMA_RX_RCV_QUEUE 4002
+#endif
/* Chip Interrupt Controller */
#define KS2_CIC2_BASE 0x02608000
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 11/19] driver: net: keystone_net: fix phy mode configuration
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (9 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 10/19] ARM: k2g: update keystone nav rx queue numbers Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 12/19] dma: keystone_nav: Fix linkram size Lokesh Vutla
` (7 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Mugunthan V N <mugunthanvnm@ti.com>
Phy mode is a board property and it can be different between
multiple board and ports, so it should not be hardcoded in
driver to one specific mode. So adding a field in eth_priv_t
structure to pass phy mode to driver.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/include/asm/ti-common/keystone_net.h | 2 ++
board/ti/ks2_evm/board_k2e.c | 8 ++++++++
board/ti/ks2_evm/board_k2hk.c | 4 ++++
board/ti/ks2_evm/board_k2l.c | 4 ++++
drivers/net/keystone_net.c | 4 ++--
5 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/ti-common/keystone_net.h b/arch/arm/include/asm/ti-common/keystone_net.h
index 4b5ea05..43a6568 100644
--- a/arch/arm/include/asm/ti-common/keystone_net.h
+++ b/arch/arm/include/asm/ti-common/keystone_net.h
@@ -11,6 +11,7 @@
#define _KEYSTONE_NET_H_
#include <asm/io.h>
+#include <phy.h>
/* EMAC */
#ifdef CONFIG_KSNET_NETCP_V1_0
@@ -243,6 +244,7 @@ struct eth_priv_t {
int phy_addr;
int slave_port;
int sgmii_link_type;
+ phy_interface_t phy_if;
struct phy_device *phy_dev;
};
diff --git a/board/ti/ks2_evm/board_k2e.c b/board/ti/ks2_evm/board_k2e.c
index dc00cf6..f58f623 100644
--- a/board/ti/ks2_evm/board_k2e.c
+++ b/board/ti/ks2_evm/board_k2e.c
@@ -82,6 +82,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 0,
.slave_port = 1,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC1",
@@ -89,6 +90,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 1,
.slave_port = 2,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC2",
@@ -96,6 +98,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 2,
.slave_port = 3,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC3",
@@ -103,6 +106,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 3,
.slave_port = 4,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC4",
@@ -110,6 +114,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 4,
.slave_port = 5,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC5",
@@ -117,6 +122,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 5,
.slave_port = 6,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC6",
@@ -124,6 +130,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 6,
.slave_port = 7,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2E_EMAC7",
@@ -131,6 +138,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 7,
.slave_port = 8,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
};
diff --git a/board/ti/ks2_evm/board_k2hk.c b/board/ti/ks2_evm/board_k2hk.c
index 6e681d7..0bd6b86 100644
--- a/board/ti/ks2_evm/board_k2hk.c
+++ b/board/ti/ks2_evm/board_k2hk.c
@@ -76,6 +76,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 0,
.slave_port = 1,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2HK_EMAC1",
@@ -83,6 +84,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 1,
.slave_port = 2,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2HK_EMAC2",
@@ -90,6 +92,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 2,
.slave_port = 3,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2HK_EMAC3",
@@ -97,6 +100,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 3,
.slave_port = 4,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
};
diff --git a/board/ti/ks2_evm/board_k2l.c b/board/ti/ks2_evm/board_k2l.c
index f35a64f..d750ad3 100644
--- a/board/ti/ks2_evm/board_k2l.c
+++ b/board/ti/ks2_evm/board_k2l.c
@@ -75,6 +75,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 0,
.slave_port = 1,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2L_EMAC1",
@@ -82,6 +83,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 1,
.slave_port = 2,
.sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2L_EMAC2",
@@ -89,6 +91,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 2,
.slave_port = 3,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
{
.int_name = "K2L_EMAC3",
@@ -96,6 +99,7 @@ struct eth_priv_t eth_priv_cfg[] = {
.phy_addr = 3,
.slave_port = 4,
.sgmii_link_type = SGMII_LINK_MAC_MAC_FORCED,
+ .phy_if = PHY_INTERFACE_MODE_SGMII,
},
};
diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c
index 67b5702..2e64e7c 100644
--- a/drivers/net/keystone_net.c
+++ b/drivers/net/keystone_net.c
@@ -569,11 +569,11 @@ int keystone2_emac_initialize(struct eth_priv_t *eth_priv)
/* Create phy device and bind it with driver */
#ifdef CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
phy_dev = phy_connect(mdio_bus, eth_priv->phy_addr,
- dev, PHY_INTERFACE_MODE_SGMII);
+ dev, eth_priv->phy_if);
phy_config(phy_dev);
#else
phy_dev = phy_find_by_mask(mdio_bus, 1 << eth_priv->phy_addr,
- PHY_INTERFACE_MODE_SGMII);
+ eth_priv->phy_if);
phy_dev->dev = dev;
#endif
eth_priv->phy_dev = phy_dev;
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 12/19] dma: keystone_nav: Fix linkram size
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (10 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 11/19] driver: net: keystone_net: fix phy mode configuration Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,12/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 13/19] driver: net: keystone_net: add support for rgmii phy Lokesh Vutla
` (6 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
Fix Linkram size.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
drivers/dma/keystone_nav.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma/keystone_nav.c b/drivers/dma/keystone_nav.c
index dfca75a..5a65b62 100644
--- a/drivers/dma/keystone_nav.c
+++ b/drivers/dma/keystone_nav.c
@@ -54,7 +54,7 @@ int _qm_init(struct qm_config *cfg)
qm_cfg = cfg;
qm_cfg->mngr_cfg->link_ram_base0 = qm_cfg->i_lram;
- qm_cfg->mngr_cfg->link_ram_size0 = HDESC_NUM * 8;
+ qm_cfg->mngr_cfg->link_ram_size0 = HDESC_NUM * 8 - 1;
qm_cfg->mngr_cfg->link_ram_base1 = 0;
qm_cfg->mngr_cfg->link_ram_size1 = 0;
qm_cfg->mngr_cfg->link_ram_base2 = 0;
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 13/19] driver: net: keystone_net: add support for rgmii phy
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (11 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 12/19] dma: keystone_nav: Fix linkram size Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 14/19] driver: net: keystone_net: removing unused code Lokesh Vutla
` (5 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
In K2G, Ethernet doesn't support SGMII instead it support RGMII,
adding support to the driver to connect to RGMII phy.
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/include/asm/ti-common/keystone_net.h | 5 +++
drivers/net/keystone_net.c | 44 ++++++++++++++++++++++++++-
2 files changed, 48 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/ti-common/keystone_net.h b/arch/arm/include/asm/ti-common/keystone_net.h
index 43a6568..a0d0d9b 100644
--- a/arch/arm/include/asm/ti-common/keystone_net.h
+++ b/arch/arm/include/asm/ti-common/keystone_net.h
@@ -193,6 +193,11 @@ struct mac_sl_cfg {
#define SGMII_RXCFG_REG(x) (EMAC_SGMII_BASE_ADDR + SGMII_OFFSET(x) + 0x034)
#define SGMII_AUXCFG_REG(x) (EMAC_SGMII_BASE_ADDR + SGMII_OFFSET(x) + 0x038)
+/* RGMII */
+#define RGMII_REG_STATUS_LINK BIT(0)
+
+#define RGMII_STATUS_REG (GBETH_BASE + 0x18)
+
/* PSS */
#ifdef CONFIG_KSNET_NETCP_V1_0
diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c
index 2e64e7c..897d867 100644
--- a/drivers/net/keystone_net.c
+++ b/drivers/net/keystone_net.c
@@ -42,7 +42,9 @@ struct rx_buff_desc net_rx_buffs = {
.rx_flow = 22,
};
+#ifndef CONFIG_SOC_K2G
static void keystone2_net_serdes_setup(void);
+#endif
int keystone2_eth_read_mac_addr(struct eth_device *dev)
{
@@ -171,6 +173,37 @@ int keystone_sgmii_link_status(int port)
(status & SGMII_REG_STATUS_LINK);
}
+#ifdef CONFIG_SOC_K2G
+int keystone_rgmii_config(struct phy_device *phy_dev)
+{
+ unsigned int i, status;
+
+ i = 0;
+ do {
+ if (i > SGMII_ANEG_TIMEOUT) {
+ puts(" TIMEOUT !\n");
+ phy_dev->link = 0;
+ return 0;
+ }
+
+ if (ctrlc()) {
+ puts("user interrupt!\n");
+ phy_dev->link = 0;
+ return -EINTR;
+ }
+
+ if ((i++ % 500) == 0)
+ printf(".");
+
+ udelay(1000); /* 1 ms */
+ status = readl(RGMII_STATUS_REG);
+ } while (!(status & RGMII_REG_STATUS_LINK));
+
+ puts(" done\n");
+
+ return 0;
+}
+#else
int keystone_sgmii_config(struct phy_device *phy_dev, int port, int interface)
{
unsigned int i, status, mask;
@@ -264,6 +297,7 @@ int keystone_sgmii_config(struct phy_device *phy_dev, int port, int interface)
return 0;
}
+#endif
int mac_sl_reset(u32 port)
{
@@ -315,7 +349,7 @@ int mac_sl_config(u_int16_t port, struct mac_sl_cfg *cfg)
writel(cfg->max_rx_len, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_MAXLEN);
writel(cfg->ctl, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_CTL);
-#if defined(CONFIG_SOC_K2E) || defined(CONFIG_SOC_K2L)
+#ifndef CONFIG_SOC_K2HK
/* Map RX packet flow priority to 0 */
writel(0, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_RX_PRI_MAP);
#endif
@@ -401,8 +435,12 @@ static int keystone2_eth_open(struct eth_device *dev, bd_t *bis)
if (sys_has_mdio)
keystone2_mdio_reset(mdio_bus);
+#ifdef CONFIG_SOC_K2G
+ keystone_rgmii_config(phy_dev);
+#else
keystone_sgmii_config(phy_dev, eth_priv->slave_port - 1,
eth_priv->sgmii_link_type);
+#endif
udelay(10000);
@@ -564,7 +602,9 @@ int keystone2_emac_initialize(struct eth_priv_t *eth_priv)
return res;
}
+#ifndef CONFIG_SOC_K2G
keystone2_net_serdes_setup();
+#endif
/* Create phy device and bind it with driver */
#ifdef CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
@@ -589,6 +629,7 @@ struct ks2_serdes ks2_serdes_sgmii_156p25mhz = {
.loopback = 0,
};
+#ifndef CONFIG_SOC_K2G
static void keystone2_net_serdes_setup(void)
{
ks2_serdes_init(CONFIG_KSNET_SERDES_SGMII_BASE,
@@ -604,3 +645,4 @@ static void keystone2_net_serdes_setup(void)
/* wait till setup */
udelay(5000);
}
+#endif
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 14/19] driver: net: keystone_net: removing unused code
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (12 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 13/19] driver: net: keystone_net: add support for rgmii phy Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 15/19] ARM: k2g: Add Ethernet Support Lokesh Vutla
` (4 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Mugunthan V N <mugunthanvnm@ti.com>
remove unused code as the same is achieved when configuring sgmii
and link status is verifed.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
drivers/net/keystone_net.c | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c
index 897d867..5ed29ae 100644
--- a/drivers/net/keystone_net.c
+++ b/drivers/net/keystone_net.c
@@ -163,16 +163,6 @@ static void __attribute__((unused))
DEVICE_EMACSL_BASE(eth_priv->slave_port - 1) + CPGMACSL_REG_CTL);
}
-int keystone_sgmii_link_status(int port)
-{
- u32 status = 0;
-
- status = __raw_readl(SGMII_STATUS_REG(port));
-
- return (status & SGMII_REG_STATUS_LOCK) &&
- (status & SGMII_REG_STATUS_LINK);
-}
-
#ifdef CONFIG_SOC_K2G
int keystone_rgmii_config(struct phy_device *phy_dev)
{
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 15/19] ARM: k2g: Add Ethernet Support
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (13 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 14/19] driver: net: keystone_net: removing unused code Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,15/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 16/19] ARM: k2g: add SD card and eMMC support Lokesh Vutla
` (3 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Vitaly Andrianov <vitalya@ti.com>
Add Ethernet support for tftp support
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
board/ti/ks2_evm/board.c | 5 +++++
board/ti/ks2_evm/board_k2g.c | 19 +++++++++++++++++++
2 files changed, 24 insertions(+)
diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c
index 73c13fc..4d7b9de 100644
--- a/board/ti/ks2_evm/board.c
+++ b/board/ti/ks2_evm/board.c
@@ -74,9 +74,14 @@ int board_eth_init(bd_t *bis)
int port_num;
char link_type_name[32];
+ if (cpu_is_k2g())
+ writel(KS2_ETHERNET_RGMII, KS2_ETHERNET_CFG);
+
/* By default, select PA PLL clock as PA clock source */
+#ifndef CONFIG_SOC_K2G
if (psc_enable_module(KS2_LPSC_PA))
return -1;
+#endif
if (psc_enable_module(KS2_LPSC_CPGMAC))
return -1;
if (psc_enable_module(KS2_LPSC_CRYPTO))
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 3852138..b2bc793 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -8,6 +8,7 @@
*/
#include <common.h>
#include <asm/arch/clock.h>
+#include <asm/ti-common/keystone_net.h>
#include "mux-k2g.h"
#define SYS_CLK 24000000
@@ -74,3 +75,21 @@ void spl_init_keystone_plls(void)
init_plls();
}
#endif
+
+#ifdef CONFIG_DRIVER_TI_KEYSTONE_NET
+struct eth_priv_t eth_priv_cfg[] = {
+ {
+ .int_name = "K2G_EMAC",
+ .rx_flow = 0,
+ .phy_addr = 0,
+ .slave_port = 1,
+ .sgmii_link_type = SGMII_LINK_MAC_PHY,
+ .phy_if = PHY_INTERFACE_MODE_RGMII,
+ },
+};
+
+int get_num_eth_ports(void)
+{
+ return sizeof(eth_priv_cfg) / sizeof(struct eth_priv_t);
+}
+#endif
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 16/19] ARM: k2g: add SD card and eMMC support
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (14 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 15/19] ARM: k2g: Add Ethernet Support Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,16/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 17/19] ARM: k2g: Enable SPI flash Lokesh Vutla
` (2 subsequent siblings)
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
From: Roger Quadros <rogerq@ti.com>
Add MMC support for k2g
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/mach-keystone/include/mach/mmc_host_def.h | 22 ++++++++++++++++++++++
board/ti/ks2_evm/board_k2g.c | 16 ++++++++++++++++
drivers/mmc/omap_hsmmc.c | 7 +++++--
3 files changed, 43 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/mach-keystone/include/mach/mmc_host_def.h
diff --git a/arch/arm/mach-keystone/include/mach/mmc_host_def.h b/arch/arm/mach-keystone/include/mach/mmc_host_def.h
new file mode 100644
index 0000000..a5050ac
--- /dev/null
+++ b/arch/arm/mach-keystone/include/mach/mmc_host_def.h
@@ -0,0 +1,22 @@
+/*
+ * K2G: MMC
+ *
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef K2G_MMC_HOST_DEF_H
+#define K2G_MMC_HOST_DEF_H
+
+#include <asm/omap_mmc.h>
+
+/*
+ * OMAP HSMMC register definitions
+ */
+
+#define OMAP_HSMMC1_BASE 0x23000100
+#define OMAP_HSMMC2_BASE 0x23100100
+
+#endif /* K2G_MMC_HOST_DEF_H */
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index b2bc793..3e1dd4c 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -9,6 +9,8 @@
#include <common.h>
#include <asm/arch/clock.h>
#include <asm/ti-common/keystone_net.h>
+#include <asm/arch/psc_defs.h>
+#include <asm/arch/mmc_host_def.h>
#include "mux-k2g.h"
#define SYS_CLK 24000000
@@ -58,6 +60,20 @@ s16 divn_val[16] = {
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
};
+#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
+int board_mmc_init(bd_t *bis)
+{
+ if (psc_enable_module(KS2_LPSC_MMC)) {
+ printf("%s module enabled failed\n", __func__);
+ return -1;
+ }
+
+ omap_mmc_init(0, 0, 0, -1, -1);
+ omap_mmc_init(1, 0, 0, -1, -1);
+ return 0;
+}
+#endif
+
#ifdef CONFIG_BOARD_EARLY_INIT_F
int board_early_init_f(void)
{
diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c
index d7b388f..5b74a5a 100644
--- a/drivers/mmc/omap_hsmmc.c
+++ b/drivers/mmc/omap_hsmmc.c
@@ -31,10 +31,12 @@
#include <twl4030.h>
#include <twl6030.h>
#include <palmas.h>
-#include <asm/gpio.h>
#include <asm/io.h>
#include <asm/arch/mmc_host_def.h>
+#if !defined(CONFIG_SOC_KEYSTONE)
+#include <asm/gpio.h>
#include <asm/arch/sys_proto.h>
+#endif
/* simplify defines to OMAP_HSMMC_USE_GPIO */
#if (defined(CONFIG_OMAP_GPIO) && !defined(CONFIG_SPL_BUILD)) || \
@@ -662,7 +664,8 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,
priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE;
#if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \
defined(CONFIG_DRA7XX) || defined(CONFIG_AM57XX) || \
- defined(CONFIG_AM43XX)) && defined(CONFIG_HSMMC2_8BIT)
+ defined(CONFIG_AM43XX) || defined(CONFIG_SOC_KEYSTONE)) && \
+ defined(CONFIG_HSMMC2_8BIT)
/* Enable 8-bit interface for eMMC on OMAP4/5 or DRA7XX */
host_caps_val |= MMC_MODE_8BIT;
#endif
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 17/19] ARM: k2g: Enable SPI flash
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (15 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 16/19] ARM: k2g: add SD card and eMMC support Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,17/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 18/19] ARM: dts: k2g: Add DT support Lokesh Vutla
2015-09-19 10:56 ` [U-Boot] [PATCH 19/19] ARM: k2g: Add config file Lokesh Vutla
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
GPIO1_9 controls SPI flash on k2g evm.
So make GPIO1_9 as output pin, inorder to use SPI.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
board/ti/ks2_evm/board_k2g.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 3e1dd4c..cdeb056 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -81,6 +81,12 @@ int board_early_init_f(void)
k2g_mux_config();
+ /* deassert FLASH_HOLD */
+ clrbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_DIR_OFFSET,
+ BIT(9));
+ setbits_le32(K2G_GPIO1_BANK2_BASE + K2G_GPIO_SETDATA_OFFSET,
+ BIT(9));
+
return 0;
}
#endif
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 18/19] ARM: dts: k2g: Add DT support
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (16 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 17/19] ARM: k2g: Enable SPI flash Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,18/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 19/19] ARM: k2g: Add config file Lokesh Vutla
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
Add basic DT support for k2g evm.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
---
arch/arm/dts/Makefile | 3 +-
arch/arm/dts/k2g-evm.dts | 21 ++++++++++++++
arch/arm/dts/k2g.dtsi | 72 ++++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 95 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/k2g-evm.dts
create mode 100644 arch/arm/dts/k2g.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index bc91934..6a7c3cc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -165,7 +165,8 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
dtb-$(CONFIG_SOC_KEYSTONE) += k2hk-evm.dtb \
k2l-evm.dtb \
- k2e-evm.dtb
+ k2e-evm.dtb \
+ k2g-evm.dtb
targets += $(dtb-y)
diff --git a/arch/arm/dts/k2g-evm.dts b/arch/arm/dts/k2g-evm.dts
new file mode 100644
index 0000000..de50e8f
--- /dev/null
+++ b/arch/arm/dts/k2g-evm.dts
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2014 Texas Instruments, Inc.
+ *
+ * Keystone 2 Galileo EVM device tree
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "k2g.dtsi"
+
+/ {
+ compatible = "ti,k2g-evm","ti,keystone";
+ model = "Texas Instruments Keystone 2 Galileo EVM";
+
+ chosen {
+ stdout-path = &uart0;
+ };
+};
diff --git a/arch/arm/dts/k2g.dtsi b/arch/arm/dts/k2g.dtsi
new file mode 100644
index 0000000..6b79b16
--- /dev/null
+++ b/arch/arm/dts/k2g.dtsi
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2014 Texas Instruments, Inc.
+ *
+ * Keystone 2 Galileo soc device tree
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "skeleton.dtsi"
+
+/ {
+ model = "Texas Instruments Keystone 2 SoC";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x80000000>;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ interrupt-parent = <&gic>;
+
+ cpu at 0 {
+ compatible = "arm,cortex-a15";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ gic: interrupt-controller {
+ compatible = "arm,cortex-a15-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x0 0x02561000 0x0 0x1000>,
+ <0x0 0x02562000 0x0 0x2000>,
+ <0x0 0x02564000 0x0 0x1000>,
+ <0x0 0x02566000 0x0 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+
+ soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "ti,keystone","simple-bus";
+ interrupt-parent = <&gic>;
+ ranges;
+
+ uart0: serial at 02530c00 {
+ compatible = "ns16550a";
+ current-speed = <115200>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ reg = <0x02530c00 0x100>;
+ clock-names = "uart";
+ interrupts = <GIC_SPI 164 IRQ_TYPE_EDGE_RISING>;
+ };
+
+ };
+};
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [PATCH 19/19] ARM: k2g: Add config file
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
` (17 preceding siblings ...)
2015-09-19 10:56 ` [U-Boot] [PATCH 18/19] ARM: dts: k2g: Add DT support Lokesh Vutla
@ 2015-09-19 10:56 ` Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,19/19] " Tom Rini
18 siblings, 1 reply; 39+ messages in thread
From: Lokesh Vutla @ 2015-09-19 10:56 UTC (permalink / raw)
To: u-boot
Add config file for k2g
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
---
board/ti/ks2_evm/MAINTAINERS | 2 ++
configs/k2g_evm_defconfig | 14 +++++++++++
include/configs/k2g_evm.h | 59 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 75 insertions(+)
create mode 100644 configs/k2g_evm_defconfig
create mode 100644 include/configs/k2g_evm.h
diff --git a/board/ti/ks2_evm/MAINTAINERS b/board/ti/ks2_evm/MAINTAINERS
index 87c36c9..999ef0a 100644
--- a/board/ti/ks2_evm/MAINTAINERS
+++ b/board/ti/ks2_evm/MAINTAINERS
@@ -8,3 +8,5 @@ F: include/configs/k2e_evm.h
F: configs/k2e_evm_defconfig
F: include/configs/k2l_evm.h
F: configs/k2l_evm_defconfig
+F: include/configs/k2g_evm.h
+F: configs/k2g_evm_defconfig
diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig
new file mode 100644
index 0000000..59020af
--- /dev/null
+++ b/configs/k2g_evm_defconfig
@@ -0,0 +1,14 @@
+CONFIG_ARM=y
+CONFIG_ARCH_KEYSTONE=y
+CONFIG_TARGET_K2G_EVM=y
+CONFIG_DEFAULT_DEVICE_TREE="k2g-evm"
+CONFIG_SPL=y
+# CONFIG_CMD_IMLS is not set
+# CONFIG_CMD_FLASH is not set
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_OF_CONTROL=y
+CONFIG_SPL_DISABLE_OF_CONTROL=y
+CONFIG_SPI_FLASH=y
+CONFIG_DM=y
+CONFIG_DM_SERIAL=y
+CONFIG_KEYSTONE_SERIAL=y
diff --git a/include/configs/k2g_evm.h b/include/configs/k2g_evm.h
new file mode 100644
index 0000000..d9ad8cf
--- /dev/null
+++ b/include/configs/k2g_evm.h
@@ -0,0 +1,59 @@
+/*
+ * Configuration header file for TI's k2g-evm
+ *
+ * (C) Copyright 2015
+ * Texas Instruments Incorporated, <www.ti.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_K2G_EVM_H
+#define __CONFIG_K2G_EVM_H
+
+/* Platform type */
+#define CONFIG_SOC_K2G
+#define CONFIG_K2G_EVM
+
+/* U-Boot general configuration */
+#define CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
+ DEFAULT_MMC_TI_ARGS \
+ "console=ttyS0,115200n8\0" \
+ "bootpart=0:2\0" \
+ "bootdir=/boot\0" \
+ "addr_mon=0x0c040000\0" \
+ "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
+ "root=ubi0:rootfs rootflags=sync rw ubi.mtd=ubifs,2048\0" \
+ "name_fdt=k2g-evm.dtb\0" \
+ "name_mon=skern-k2g.bin\0" \
+ "name_ubi=k2g-evm-ubifs.ubi\0" \
+ "name_uboot=u-boot-spi-k2g-evm.gph\0" \
+ "init_mmc=run args_all args_mmc\0" \
+ "get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0"\
+ "get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
+ "${bootdir}/${name_kern}\0" \
+ "get_mon_mmc=load mmc ${bootpart} ${addr_mon} ${bootdir}/${name_mon}\0"\
+
+#include <configs/ti_armv7_keystone2.h>
+
+/* SPL SPI Loader Configuration */
+#define CONFIG_SPL_TEXT_BASE 0x0c080000
+
+/* NAND Configuration */
+#define CONFIG_SYS_NAND_PAGE_2K
+
+/* Network */
+#define CONFIG_KSNET_NETCP_V1_5
+#define CONFIG_KSNET_CPSW_NUM_PORTS 2
+#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
+#define CONFIG_PHY_MICREL
+
+/* MMC/SD */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_CMD_MMC
+
+#define CONFIG_SF_DEFAULT_BUS 1
+#define CONFIG_SF_DEFAULT_CS 0
+
+#endif /* __CONFIG_K2G_EVM_H */
--
2.1.4
^ permalink raw reply related [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot, 01/19] ARM: k2g: Add support for CPU detection
2015-09-19 10:56 ` [U-Boot] [PATCH 01/19] ARM: k2g: Add support for CPU detection Lokesh Vutla
@ 2015-10-22 21:21 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:21 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:38PM +0530, Lokesh Vutla wrote:
> Adding CPU detection support for Keystone2 Galileo.
>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/14f1fcda/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,02/19] ARM: k2g: Add kconfig support
2015-09-19 10:56 ` [U-Boot] [PATCH 02/19] ARM: k2g: Add kconfig support Lokesh Vutla
@ 2015-10-22 21:21 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:21 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:39PM +0530, Lokesh Vutla wrote:
> Add Kconfig support
>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/07fead12/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,03/19] ARM: k2g: Add pll data
2015-09-19 10:56 ` [U-Boot] [PATCH 03/19] ARM: k2g: Add pll data Lokesh Vutla
@ 2015-10-22 21:21 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:21 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:40PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> Add pll data for k2g
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/c4d62b7b/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,04/19] ARM: k2g: Add clock information
2015-09-19 10:56 ` [U-Boot] [PATCH 04/19] ARM: k2g: Add clock information Lokesh Vutla
@ 2015-10-22 21:21 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:21 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:41PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> Add clock information for Galileo
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/4f226ab8/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,05/19] ARM: k2g: Add PSC info
2015-09-19 10:56 ` [U-Boot] [PATCH 05/19] ARM: k2g: Add PSC info Lokesh Vutla
@ 2015-10-22 21:21 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:21 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:42PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> Add psc information for k2g
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/cc6c1397/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,06/19] ARM: k2g: Add ddr3 info
2015-09-19 10:56 ` [U-Boot] [PATCH 06/19] ARM: k2g: Add ddr3 info Lokesh Vutla
@ 2015-10-22 21:21 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:21 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:43PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> Add ddr3 related info
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/5c8c2835/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot, 07/19] ARM: k2g: Add support for pin mux configuration
2015-09-19 10:56 ` [U-Boot] [PATCH 07/19] ARM: k2g: Add support for pin mux configuration Lokesh Vutla
@ 2015-10-22 21:21 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:21 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:44PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> Add api for configuring pin mux.
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/67052841/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,08/19] ARM: k2g: Add pin mux data
2015-09-19 10:56 ` [U-Boot] [PATCH 08/19] ARM: k2g: Add pin mux data Lokesh Vutla
@ 2015-10-22 21:21 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:21 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:45PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> Add pin mux data for k2g-evm
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/137a0252/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,09/19] ARM: k2g: Correct base addresses
2015-09-19 10:56 ` [U-Boot] [PATCH 09/19] ARM: k2g: Correct base addresses Lokesh Vutla
@ 2015-10-22 21:21 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:21 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:46PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> Coreect base addresses for SPI, Queue Manager, Ethernet, GPIO,
> and MSMC segments.
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/7c36af0c/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot, 10/19] ARM: k2g: update keystone nav rx queue numbers
2015-09-19 10:56 ` [U-Boot] [PATCH 10/19] ARM: k2g: update keystone nav rx queue numbers Lokesh Vutla
@ 2015-10-22 21:21 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:21 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:47PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> update K2G nav rx queue number
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/a8c32658/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot, 11/19] driver: net: keystone_net: fix phy mode configuration
2015-09-19 10:56 ` [U-Boot] [PATCH 11/19] driver: net: keystone_net: fix phy mode configuration Lokesh Vutla
@ 2015-10-22 21:22 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:22 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:48PM +0530, Lokesh Vutla wrote:
> From: Mugunthan V N <mugunthanvnm@ti.com>
>
> Phy mode is a board property and it can be different between
> multiple board and ports, so it should not be hardcoded in
> driver to one specific mode. So adding a field in eth_priv_t
> structure to pass phy mode to driver.
>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/e8e86265/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,12/19] dma: keystone_nav: Fix linkram size
2015-09-19 10:56 ` [U-Boot] [PATCH 12/19] dma: keystone_nav: Fix linkram size Lokesh Vutla
@ 2015-10-22 21:22 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:22 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:49PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> Fix Linkram size.
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/f65a6fe9/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot, 13/19] driver: net: keystone_net: add support for rgmii phy
2015-09-19 10:56 ` [U-Boot] [PATCH 13/19] driver: net: keystone_net: add support for rgmii phy Lokesh Vutla
@ 2015-10-22 21:22 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:22 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:50PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> In K2G, Ethernet doesn't support SGMII instead it support RGMII,
> adding support to the driver to connect to RGMII phy.
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/7326edbc/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot, 14/19] driver: net: keystone_net: removing unused code
2015-09-19 10:56 ` [U-Boot] [PATCH 14/19] driver: net: keystone_net: removing unused code Lokesh Vutla
@ 2015-10-22 21:22 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:22 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:51PM +0530, Lokesh Vutla wrote:
> From: Mugunthan V N <mugunthanvnm@ti.com>
>
> remove unused code as the same is achieved when configuring sgmii
> and link status is verifed.
>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/cd91a761/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,15/19] ARM: k2g: Add Ethernet Support
2015-09-19 10:56 ` [U-Boot] [PATCH 15/19] ARM: k2g: Add Ethernet Support Lokesh Vutla
@ 2015-10-22 21:22 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:22 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:52PM +0530, Lokesh Vutla wrote:
> From: Vitaly Andrianov <vitalya@ti.com>
>
> Add Ethernet support for tftp support
>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/0d266aef/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,16/19] ARM: k2g: add SD card and eMMC support
2015-09-19 10:56 ` [U-Boot] [PATCH 16/19] ARM: k2g: add SD card and eMMC support Lokesh Vutla
@ 2015-10-22 21:22 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:22 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:53PM +0530, Lokesh Vutla wrote:
> From: Roger Quadros <rogerq@ti.com>
>
> Add MMC support for k2g
>
> Signed-off-by: Roger Quadros <rogerq@ti.com>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/fcf49b1d/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,17/19] ARM: k2g: Enable SPI flash
2015-09-19 10:56 ` [U-Boot] [PATCH 17/19] ARM: k2g: Enable SPI flash Lokesh Vutla
@ 2015-10-22 21:22 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:22 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:54PM +0530, Lokesh Vutla wrote:
> GPIO1_9 controls SPI flash on k2g evm.
> So make GPIO1_9 as output pin, inorder to use SPI.
>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/130775b8/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,18/19] ARM: dts: k2g: Add DT support
2015-09-19 10:56 ` [U-Boot] [PATCH 18/19] ARM: dts: k2g: Add DT support Lokesh Vutla
@ 2015-10-22 21:22 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:22 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:55PM +0530, Lokesh Vutla wrote:
> Add basic DT support for k2g evm.
>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/238aad76/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
* [U-Boot] [U-Boot,19/19] ARM: k2g: Add config file
2015-09-19 10:56 ` [U-Boot] [PATCH 19/19] ARM: k2g: Add config file Lokesh Vutla
@ 2015-10-22 21:22 ` Tom Rini
0 siblings, 0 replies; 39+ messages in thread
From: Tom Rini @ 2015-10-22 21:22 UTC (permalink / raw)
To: u-boot
On Sat, Sep 19, 2015 at 04:26:56PM +0530, Lokesh Vutla wrote:
> Add config file for k2g
>
> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
> Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Applied to u-boot/master, thanks!
--
Tom
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 836 bytes
Desc: Digital signature
URL: <http://lists.denx.de/pipermail/u-boot/attachments/20151022/8846ead7/attachment.sig>
^ permalink raw reply [flat|nested] 39+ messages in thread
end of thread, other threads:[~2015-10-22 21:22 UTC | newest]
Thread overview: 39+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2015-09-19 10:56 [U-Boot] [PATCH 00/19] ARM: k2g: Add support for 66AK2G02 Lokesh Vutla
2015-09-19 10:56 ` [U-Boot] [PATCH 01/19] ARM: k2g: Add support for CPU detection Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 02/19] ARM: k2g: Add kconfig support Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,02/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 03/19] ARM: k2g: Add pll data Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,03/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 04/19] ARM: k2g: Add clock information Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,04/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 05/19] ARM: k2g: Add PSC info Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,05/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 06/19] ARM: k2g: Add ddr3 info Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,06/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 07/19] ARM: k2g: Add support for pin mux configuration Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 08/19] ARM: k2g: Add pin mux data Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,08/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 09/19] ARM: k2g: Correct base addresses Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot,09/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 10/19] ARM: k2g: update keystone nav rx queue numbers Lokesh Vutla
2015-10-22 21:21 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 11/19] driver: net: keystone_net: fix phy mode configuration Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 12/19] dma: keystone_nav: Fix linkram size Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,12/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 13/19] driver: net: keystone_net: add support for rgmii phy Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 14/19] driver: net: keystone_net: removing unused code Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot, " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 15/19] ARM: k2g: Add Ethernet Support Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,15/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 16/19] ARM: k2g: add SD card and eMMC support Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,16/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 17/19] ARM: k2g: Enable SPI flash Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,17/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 18/19] ARM: dts: k2g: Add DT support Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,18/19] " Tom Rini
2015-09-19 10:56 ` [U-Boot] [PATCH 19/19] ARM: k2g: Add config file Lokesh Vutla
2015-10-22 21:22 ` [U-Boot] [U-Boot,19/19] " Tom Rini
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox