[U-Boot] [PATCH 04/19] ARM: k2g: Add clock information

Lokesh Vutla
2015-09-19T10:56:41Z

From: Vitaly Andrianov <vitalya@ti.com>

Add clock information for Galileo

Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
---
arch/arm/include/asm/ti-common/keystone_net.h | 4 ++++
arch/arm/mach-keystone/clock.c | 4 ++++
arch/arm/mach-keystone/cmd_mon.c | 2 +-
arch/arm/mach-keystone/include/mach/clock-k2g.h | 2 ++
arch/arm/mach-keystone/include/mach/clock.h | 4 +++-
board/ti/ks2_evm/board_k2g.c | 10 ++++++++++
include/configs/ti_armv7_keystone2.h | 11 ++++++++++-
7 files changed, 34 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/ti-common/keystone_net.h b/arch/arm/include/asm/ti-common/keystone_net.h
index 011c03c..4b5ea05 100644
--- a/arch/arm/include/asm/ti-common/keystone_net.h
+++ b/arch/arm/include/asm/ti-common/keystone_net.h
@@ -49,7 +49,11 @@
#define MAC_ID_BASE_ADDR CONFIG_KSNET_MAC_ID_BASE

/* MDIO module input frequency */
+#ifdef CONFIG_SOC_K2G
+#define EMAC_MDIO_BUS_FREQ (clk_get_rate(sys_clk0_3_clk))
+#else
#define EMAC_MDIO_BUS_FREQ (clk_get_rate(pass_pll_clk))
+#endif
/* MDIO clock output frequency */
#define EMAC_MDIO_CLOCK_FREQ 2500000 /* 2.5 MHz */

diff --git a/arch/arm/mach-keystone/clock.c b/arch/arm/mach-keystone/clock.c
index 31ae936..5d37ac3 100644
--- a/arch/arm/mach-keystone/clock.c
+++ b/arch/arm/mach-keystone/clock.c
@@ -356,6 +356,10 @@ unsigned long clk_get_rate(unsigned int clk)
if (cpu_is_k2hk())
freq = pll_freq_get(DDR3B_PLL);
break;
+ case uart_pll_clk:
+ if (cpu_is_k2g())
+ freq = pll_freq_get(UART_PLL);
+ break;
case sys_clk0_1_clk:
case sys_clk0_clk:
freq = pll_freq_get(CORE_PLL) / pll0div_read(1);
diff --git a/arch/arm/mach-keystone/cmd_mon.c b/arch/arm/mach-keystone/cmd_mon.c
index 73ceb83..a539d5d 100644
--- a/arch/arm/mach-keystone/cmd_mon.c
+++ b/arch/arm/mach-keystone/cmd_mon.c
@@ -37,7 +37,7 @@ static int do_mon_install(cmd_tbl_t *cmdtp, int flag, int argc,
if (argc < 2)
return CMD_RET_USAGE;

- freq = clk_get_rate(sys_clk0_6_clk);
+ freq = CONFIG_SYS_HZ_CLOCK;

addr = simple_strtoul(argv[1], NULL, 16);

diff --git a/arch/arm/mach-keystone/include/mach/clock-k2g.h b/arch/arm/mach-keystone/include/mach/clock-k2g.h
index 4d3f92e..214c1d3 100644
--- a/arch/arm/mach-keystone/include/mach/clock-k2g.h
+++ b/arch/arm/mach-keystone/include/mach/clock-k2g.h
@@ -15,4 +15,6 @@
#define DEV_SUPPORTED_SPEEDS 0xfff
#define ARM_SUPPORTED_SPEEDS 0xfff

+#define KS2_CLK1_6 sys_clk0_6_clk
+
#endif
diff --git a/arch/arm/mach-keystone/include/mach/clock.h b/arch/arm/mach-keystone/include/mach/clock.h
index 0a59fa0..05c2a76 100644
--- a/arch/arm/mach-keystone/include/mach/clock.h
+++ b/arch/arm/mach-keystone/include/mach/clock.h
@@ -53,7 +53,8 @@
CLK(17, sys_clk1_6_clk)\
CLK(18, sys_clk1_12_clk)\
CLK(19, sys_clk2_clk)\
- CLK(20, sys_clk3_clk)
+ CLK(20, sys_clk3_clk)\
+ CLK(21, uart_pll_clk)

#include <asm/types.h>

@@ -91,6 +92,7 @@ enum ext_clk_e {
tetris_clk,
ddr3a_clk,
ddr3b_clk,
+ uart_clk,
ext_clk_count /* number of external clocks */
};

diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c
index 6234baa..2d4602f 100644
--- a/board/ti/ks2_evm/board_k2g.c
+++ b/board/ti/ks2_evm/board_k2g.c
@@ -9,6 +9,16 @@
#include <common.h>
#include <asm/arch/clock.h>

+#define SYS_CLK 24000000
+
+unsigned int external_clk[ext_clk_count] = {
+ [sys_clk] = SYS_CLK,
+ [pa_clk] = SYS_CLK,
+ [tetris_clk] = SYS_CLK,
+ [ddr3a_clk] = SYS_CLK,
+ [uart_clk] = SYS_CLK,
+};
+
static struct pll_init_data main_pll_config = {MAIN_PLL, 100, 1, 4};
static struct pll_init_data tetris_pll_config = {TETRIS_PLL, 100, 1, 4};
static struct pll_init_data uart_pll_config = {UART_PLL, 64, 1, 4};
diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h
index 1830760..ed86561 100644
--- a/include/configs/ti_armv7_keystone2.h
+++ b/include/configs/ti_armv7_keystone2.h
@@ -68,9 +68,14 @@
#endif
#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
-#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
#define CONFIG_CONS_INDEX 1

+#ifndef CONFIG_SOC_K2G
+#define CONFIG_SYS_NS16550_CLK clk_get_rate(KS2_CLK1_6)
+#else
+#define CONFIG_SYS_NS16550_CLK clk_get_rate(uart_pll_clk) / 2
+#endif
+
/* SPI Configuration */
#define CONFIG_SPI_FLASH_STMICRO
#define CONFIG_DAVINCI_SPI
@@ -302,6 +307,10 @@
/* we may include files below only after all above definitions */
#include <asm/arch/hardware.h>
#include <asm/arch/clock.h>
+#ifndef CONFIG_SOC_K2G
#define CONFIG_SYS_HZ_CLOCK clk_get_rate(KS2_CLK1_6)
+#else
+#define CONFIG_SYS_HZ_CLOCK external_clk[sys_clk]
+#endif

#endif /* __CONFIG_KS2_EVM_H */
--
2.1.4