public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed
From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4 18/24] spi: cadence_qspi_apb: Use GENMASK
Date: Fri, 23 Oct 2015 20:17:06 +0200	[thread overview]
Message-ID: <201510232017.06640.marex@denx.de> (raw)
In-Reply-To: <CAD6G_RRt4zSkd+Ng5NLbxR=Esu8zWe1Tg--zx_T9Xtsmi+HkCA@mail.gmail.com>

On Friday, October 23, 2015 at 07:17:28 PM, Jagan Teki wrote:
> On 23 October 2015 at 02:55, Tom Rini <trini@konsulko.com> wrote:
> > On Thu, Oct 22, 2015 at 07:10:17PM -0200, Fabio Estevam wrote:
> >> On Thu, Oct 22, 2015 at 6:50 PM, Jagan Teki <jteki@openedev.com> wrote:
> >> >         reg &= ~(CQSPI_REG_CONFIG_CHIPSELECT_MASK
> >> > 
> >> > @@ -719,7 +719,7 @@ int cadence_qspi_apb_indirect_read_setup(struct
> >> > cadence_spi_platdata *plat,
> >> > 
> >> >  #if defined(CONFIG_SPL_SPI_XIP) && defined(CONFIG_SPL_BUILD)
> >> >  
> >> >                 writel(0x0, plat->regbase + CQSPI_REG_MODE_BIT);
> >> >  
> >> >  #else
> >> > 
> >> > -               writel(0xFF, plat->regbase + CQSPI_REG_MODE_BIT);
> >> > +               writel(GENMASK(7, 0), plat->regbase +
> >> > CQSPI_REG_MODE_BIT);
> >> 
> >> Is the 0xFF really a mask here? It seems it is just writing 0xFF to
> >> the register directly without any masking operation.
> 
> As register got initialized to all 1's like masking all to set may be
> we can add a macro like MODE_BIT_MASK and then will assign GENMASK to
> that.

Please keep the 0xff value, I agree with Fabio.

Best regards,
Marek Vasut

  reply	other threads:[~2015-10-23 18:17 UTC|newest]

Thread overview: 61+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-22 20:50 [U-Boot] [PATCH v4 00/24] spi: Use BIT and GENMASK Jagan Teki
2015-10-22 20:50 ` [U-Boot] [PATCH v4 01/24] spi: zynq_[q]spi: Use BIT macro Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 02/24] spi: zynq_[q]spi: Use GENMASK macro Jagan Teki
2015-10-22 20:50 ` [U-Boot] [PATCH v4 03/24] spi: altera_spi: Use BIT macro Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 04/24] spi: atmel_spi: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 05/24] spi: bfin_spi6xx: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 06/24] spi: cadence_qspi_apb: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-23 17:11   ` Vikas MANOCHA
2015-10-22 20:50 ` [U-Boot] [PATCH v4 07/24] spi: designware_spi: " Jagan Teki
2015-10-22 20:50 ` [U-Boot] [PATCH v4 08/24] spi: exynos_spi: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-24  3:26     ` Jagan Teki
2015-10-22 20:50 ` [U-Boot] [PATCH v4 09/24] spi: fsl: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 10/24] spi: ich: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 11/24] spi: mpc8xxx_spi: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 12/24] spi: omap3_spi: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 13/24] spi: sh_qspi: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 14/24] spi: tegra: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 15/24] spi: ti_qspi: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 16/24] spi: xilinx_spi: " Jagan Teki
2015-10-22 21:24   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 17/24] spi: atmel_spi: Use GENMASK Jagan Teki
2015-10-22 21:25   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 18/24] spi: cadence_qspi_apb: " Jagan Teki
2015-10-22 21:10   ` Fabio Estevam
2015-10-22 21:25     ` Tom Rini
2015-10-23 17:17       ` Jagan Teki
2015-10-23 18:17         ` Marek Vasut [this message]
2015-10-23 18:39         ` Fabio Estevam
2015-10-23 20:03         ` Tom Rini
2015-10-23 17:11   ` Vikas MANOCHA
2015-10-23 18:18   ` Marek Vasut
2015-10-22 20:50 ` [U-Boot] [PATCH v4 19/24] spi: designware_spi: " Jagan Teki
2015-10-22 21:25   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 20/24] spi: fsl_qspi: " Jagan Teki
2015-10-22 20:50 ` [U-Boot] [PATCH v4 21/24] spi: mxs_spi: " Jagan Teki
2015-10-22 21:08   ` Fabio Estevam
2015-10-22 21:15     ` Jagan Teki
2015-10-22 21:18       ` Fabio Estevam
2015-10-23  8:23         ` Jagan Teki
2015-10-22 21:30       ` Marek Vasut
2015-10-23  8:27         ` Jagan Teki
2015-10-22 21:25     ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 22/24] spi: omap3_spi: " Jagan Teki
2015-10-22 21:25   ` Tom Rini
2015-10-22 20:50 ` [U-Boot] [PATCH v4 23/24] spi: tegra: " Jagan Teki
2015-10-22 20:50 ` [U-Boot] [PATCH v4 24/24] spi: xilinx_spi: " Jagan Teki
2015-10-22 21:25 ` [U-Boot] [PATCH v4 00/24] spi: Use BIT and GENMASK Tom Rini
2015-10-23 17:10   ` Jagan Teki

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=201510232017.06640.marex@denx.de \
    --to=marex@denx.de \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox