From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peng Fan Date: Tue, 27 Oct 2015 13:28:54 +0800 Subject: [U-Boot] [PATCH V2 01/14] mxs: add parameter base_addr for mxs_set_lcdclk In-Reply-To: <562E4C5B.60902@denx.de> References: <1445341184-22272-1-git-send-email-Peng.Fan@freescale.com> <1445341184-22272-2-git-send-email-Peng.Fan@freescale.com> <56263C01.4080504@denx.de> <20151026025719.GA13617@shlinux2> <562E4C5B.60902@denx.de> Message-ID: <20151027052834.GA13358@shlinux2> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Stefano, On Mon, Oct 26, 2015 at 04:52:59PM +0100, Stefano Babic wrote: >Hi Peng, > >On 26/10/2015 03:57, Peng Fan wrote: >> Hi Stefano, >> >> Sorry for this late reply. >> >> On Tue, Oct 20, 2015 at 03:05:05PM +0200, Stefano Babic wrote: >>> Hi Peng, >>> >>> >>> On 20/10/2015 13:39, Peng Fan wrote: >>>> Change mxs_set_lcdclk prototype to add a new parameter >>>> base_addr. There are two LCD interfaces for i.MX6SX, >>>> we may support LCDIF1 or LCDIF2. >>>> >>> >>> ok - from your commit message I am waiting that both LCDIF1 and LCDIF2 >>> can be supported, and a user (board maintainer) can switch between them. >>> And in later patch mxs_set_lcdclk() is avalilable for mx6sx and mx6ul, >>> that makes this inconsistent. >> >> I can not get you about 'inconsistent'. >> >> The reason to add LCDIF1 and LCDIF2 >> support is that the board design may use LCDIF1 or LCDIF2. The mxs_set_lcdlck >> should support setting clock for LCDIF1 and LCDIF2. >> >> There two LCDIFs for i.MX6SX and i.MX7D. > >This is fine, but I had the impression that the patch supports LCDIF1 on >mx6(sx|ul) and mx7, not LCDIF2. It looks like I have misunderstood. Can >you help me to better understand ? Does it really work with LCDIF2 ? The patch set contains clk related register settings, see mxs_set_lcdclk, in patch [PATCH V2 07/14] imx: mx6: add clock api for lcdif. I need to address your comments about this patch. The is_cpu_type(MXC_CPU_MX6SX) handles the LCDIF2. I have not tested it for lCDIF2, but it's in fsl's vendor uboot, it should work. For now, I only have 6ul and 7d in hand to test LCDIF1. Regards, Peng. > >> >>> >>> But I do not understand how the support for the second LCDIF is >>> implemented. I should see that the register set points to LCDIF1 or LCDIF2. > >Again this is the point I misunderstand. > > >Best regards, >Stefano Babic > >-- >===================================================================== >DENX Software Engineering GmbH, Managing Director: Wolfgang Denk >HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany >Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de >===================================================================== --