From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Tue, 3 Nov 2015 04:33:13 +0100
Subject: [U-Boot] [PATCH] arm: socfpga: reset: correct dma, qspi,
	and sdmmc reset bit defines
In-Reply-To: <alpine.DEB.2.02.1511022110210.22097@linux-builds1>
References: <1446505881-19673-1-git-send-email-dinguyen@opensource.altera.com>
 <201511030316.34216.marex@denx.de>
 <alpine.DEB.2.02.1511022110210.22097@linux-builds1>
Message-ID: <201511030433.13165.marex@denx.de>
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To: u-boot@lists.denx.de

On Tuesday, November 03, 2015 at 04:13:37 AM, Dinh Nguyen wrote:
> On Tue, 3 Nov 2015, Marek Vasut wrote:
> > On Tuesday, November 03, 2015 at 12:11:21 AM,
> > dinguyen at opensource.altera.com
> > 
> > wrote:
> > > From: Dinh Nguyen <dinguyen@opensource.altera.com>
> > > 
> > > The DMA, QSPI, and SD/MMC reset bits are located in the permodrst
> > > register, not the mpumodrst. So the bank for these reset bits should
> > > be 1, not 0.
> > > 
> > > Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
> > 
> > Thanks for finding this:
> > Acked-by: Marek Vasut <marex@denx.de>
> > 
> > btw. how did you find this? I doubt it was some casual reading of the
> > source code :)
> 
> I stumbled on this when I started adding the reset driver for Arria10, and
> did a quick code review.

Neat !

Best regards,
Marek Vasut