[U-Boot] [PATCH] arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines

Dinh Nguyen
2015-11-03T03:13:37Z

On Tue, 3 Nov 2015, Marek Vasut wrote:

> On Tuesday, November 03, 2015 at 12:11:21 AM, dinguyen at opensource.altera.com
> wrote:
> > From: Dinh Nguyen <dinguyen@opensource.altera.com>
> >
> > The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
> > not the mpumodrst. So the bank for these reset bits should be 1, not 0.
> >
> > Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
>
> Thanks for finding this:
> Acked-by: Marek Vasut <marex@denx.de>
>
> btw. how did you find this? I doubt it was some casual reading of the source
> code :)
>

I stumbled on this when I started adding the reset driver for Arria10, and did
a quick code review.

BR,
Dinh