From mboxrd@z Thu Jan  1 00:00:00 1970
From: Marek Vasut <marex@denx.de>
Date: Thu, 5 Nov 2015 17:38:45 +0100
Subject: [U-Boot] [PATCH] mmc: atmel: Properly fix clock configuration
In-Reply-To: <1446735196-23171-2-git-send-email-gregory.clement@free-electrons.com>
References: <1446735196-23171-1-git-send-email-gregory.clement@free-electrons.com>
 <1446735196-23171-2-git-send-email-gregory.clement@free-electrons.com>
Message-ID: <201511051738.45738.marex@denx.de>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

On Thursday, November 05, 2015 at 03:53:16 PM, Gregory CLEMENT wrote:
> Timing issue occurs on eMMC not only when modifying the frequency but
> also for all the switch command(CMD6). According to the MMC spec waiting
> 8 clocks after a switch command would be the thing to do.
> 
> This patch allows fixing CPU hang observed when trying to changing the
> bus width on a eMMC on SAMA5D4.
> 
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

On DENX MA5D4EVK:

Tested-by: Marek Vasut <marex@denx.de>

[...]

> @@ -284,8 +286,10 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
> struct mmc_data *data) {
>  				u32 cnt = word_count * 4;
>  				printf("Read Data:\n");
> +				/*
>  				print_buffer(0, data->dest + cnt * block_count,
>  					     1, cnt, 0);
> +				*/

This bit shouldn't be in the patch I guess ;-)

>  			}
>  #endif
>  #ifdef DEBUG
> @@ -323,6 +327,12 @@ mci_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd,
> struct mmc_data *data) }
>  	}
> 
> +	/* After the switch command, wait for 8 clocks before the next
> +	 * command
> +	 */

The comment style should match the kernel one -- multilines go like this:
/*
 * foo
 * bar
 */

> +	if (cmd->cmdidx == MMC_CMD_SWITCH)
> +		udelay(8*1000000/ priv->curr_clk); /* 8 clk in us*/
> +
>  	return 0;
>  }

Best regards,
Marek Vasut