[U-Boot] [PATCH V4 1/3] arm: discard relocation entries for secure text

[U-Boot] [PATCH V4 1/3] arm: discard relocation entries for secure text

[Peng Fan]

The code such as PSCI in section named secure is bundled with
u-boot image, and when bootm, the code will be copied to their
runtime address same to compliation/linking address -
CONFIG_ARMV7_SECURE_BASE.

When compile the PSCI code and link it into the u-boot image,
there will be relocation entries in .rel.dyn section for PSCI.
Actually, we do not needs these relocation entries.

If still keep the relocation entries in .rel.dyn section,
r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid
address which may not support read/write for one SoC.
102         /* relative fix: increase location by offset */
103         add     r0, r0, r4
104         ldr     r1, [r0]
105         add     r1, r1, r4
106         str     r1, [r0]

So discard them to avoid touching the relocation entry in
arch/arm/lib/relocate.S.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Hans De Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Stefano Babic <sbabic@denx.de>
---

Changes v4:
 none

V2 thread: http://lists.denx.de/pipermail/u-boot/2015-October/230755.html
Changes v3:
 Move the relocation entries to the very begining and discard them.

V1 thread: http://lists.denx.de/pipermail/u-boot/2015-October/229426.html
Changes V2:
 Refine commit msg.
 Discard the relocation entry section for secure text. 

 arch/arm/cpu/u-boot.lds | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 03cd9f6..d48a905 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -14,6 +14,23 @@ OUTPUT_ARCH(arm)
 ENTRY(_start)
 SECTIONS
 {
+	/*
+	 * Discard the relocation entries for secure text.
+	 * The secure code is bundled with u-boot image, so there will
+	 * be relocations entries for the secure code, since we use
+	 * "-mword-relocations" to compile and "-pie" to link into the
+	 * final image. We do not need the relocation entries for secure
+	 * code, because secure code will not be relocated, it only needs
+	 * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
+	 * which is the linking and running address for secure code.
+	 * If keep the relocation entries in .rel.dyn section,
+	 * "relocation offset + linking address" may locates into an
+	 * address that is reserved by SoC, then will trigger data abort.
+	 *
+	 * The reason that move .rel._secure at the beginning, is to
+	 * avoid hole in the final image.
+	 */
+	/DISCARD/ : { *(.rel._secure*) }
 	. = 0x00000000;
 
 	. = ALIGN(4);
-- 
1.8.4

[U-Boot] [PATCH V4 1/3] arm: discard relocation entries for secure text

[Peng Fan]

The code such as PSCI in section named secure is bundled with
u-boot image, and when bootm, the code will be copied to their
runtime address same to compliation/linking address -
CONFIG_ARMV7_SECURE_BASE.

When compile the PSCI code and link it into the u-boot image,
there will be relocation entries in .rel.dyn section for PSCI.
Actually, we do not needs these relocation entries.

If still keep the relocation entries in .rel.dyn section,
r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid
address which may not support read/write for one SoC.
102         /* relative fix: increase location by offset */
103         add     r0, r0, r4
104         ldr     r1, [r0]
105         add     r1, r1, r4
106         str     r1, [r0]

So discard them to avoid touching the relocation entry in
arch/arm/lib/relocate.S.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Hans De Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
Cc: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Stefano Babic <sbabic@denx.de>
---

Changes v4:
 none

V2 thread: http://lists.denx.de/pipermail/u-boot/2015-October/230755.html
Changes v3:
 Move the relocation entries to the very begining and discard them.

V1 thread: http://lists.denx.de/pipermail/u-boot/2015-October/229426.html
Changes V2:
 Refine commit msg.
 Discard the relocation entry section for secure text.

 arch/arm/cpu/u-boot.lds | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
index 03cd9f6..d48a905 100644
--- a/arch/arm/cpu/u-boot.lds
+++ b/arch/arm/cpu/u-boot.lds
@@ -14,6 +14,23 @@ OUTPUT_ARCH(arm)
 ENTRY(_start)
 SECTIONS
 {
+	/*
+	 * Discard the relocation entries for secure text.
+	 * The secure code is bundled with u-boot image, so there will
+	 * be relocations entries for the secure code, since we use
+	 * "-mword-relocations" to compile and "-pie" to link into the
+	 * final image. We do not need the relocation entries for secure
+	 * code, because secure code will not be relocated, it only needs
+	 * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
+	 * which is the linking and running address for secure code.
+	 * If keep the relocation entries in .rel.dyn section,
+	 * "relocation offset + linking address" may locates into an
+	 * address that is reserved by SoC, then will trigger data abort.
+	 *
+	 * The reason that move .rel._secure at the beginning, is to
+	 * avoid hole in the final image.
+	 */
+	/DISCARD/ : { *(.rel._secure*) }
 	. = 0x00000000;
 
 	. = ALIGN(4);
-- 
1.8.4

[U-Boot] [PATCH V4 2/3] mx7: psci: add basic psci support

[Peng Fan]

1. add basic psci support for imx7 chip.
2. support cpu_on and cpu_off.
3. switch to non-secure mode when boot linux kernel.
4. set csu allow accessing all peripherial register in non-secure mode.

Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
---

Changes V4:
 Use macros but not magic number for init CSU.

Changes V3:
 Addressed Fabio and Frank's comments.
 http://lists.denx.de/pipermail/u-boot/2015-October/230756.html

Changes V2:
 Refine commit msg.

 arch/arm/cpu/armv7/mx7/Makefile          |  4 ++
 arch/arm/cpu/armv7/mx7/psci-mx7.c        | 69 ++++++++++++++++++++++++++++++++
 arch/arm/cpu/armv7/mx7/psci.S            | 54 +++++++++++++++++++++++++
 arch/arm/cpu/armv7/mx7/soc.c             |  9 +++++
 arch/arm/include/asm/arch-mx7/imx-regs.h |  3 ++
 5 files changed, 139 insertions(+)
 create mode 100644 arch/arm/cpu/armv7/mx7/psci-mx7.c
 create mode 100644 arch/arm/cpu/armv7/mx7/psci.S

diff --git a/arch/arm/cpu/armv7/mx7/Makefile b/arch/arm/cpu/armv7/mx7/Makefile
index e6ecef0..d21f87f 100644
--- a/arch/arm/cpu/armv7/mx7/Makefile
+++ b/arch/arm/cpu/armv7/mx7/Makefile
@@ -6,3 +6,7 @@
 #
 
 obj-y	:= soc.o clock.o clock_slice.o
+
+ifdef CONFIG_ARMV7_PSCI
+obj-y  += psci-mx7.o psci.o
+endif
diff --git a/arch/arm/cpu/armv7/mx7/psci-mx7.c b/arch/arm/cpu/armv7/mx7/psci-mx7.c
new file mode 100644
index 0000000..9a33047
--- /dev/null
+++ b/arch/arm/cpu/armv7/mx7/psci-mx7.c
@@ -0,0 +1,69 @@
+#include <asm/io.h>
+#include <asm/psci.h>
+#include <asm/arch/imx-regs.h>
+#include <common.h>
+
+#define __secure __attribute__((section("._secure.text")))
+
+#define GPC_CPU_PGC_SW_PDN_REQ	0xfc
+#define GPC_CPU_PGC_SW_PUP_REQ	0xf0
+#define GPC_PGC_C1		0x840
+
+#define BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7	0x2
+
+/* below is for i.MX7D */
+#define SRC_GPR1_MX7D		0x074
+#define SRC_A7RCR0		0x004
+#define SRC_A7RCR1		0x008
+
+#define BP_SRC_A7RCR0_A7_CORE_RESET0	0
+#define BP_SRC_A7RCR1_A7_CORE1_ENABLE	1
+
+static inline void imx_gpcv2_set_m_core_pgc(bool enable, u32 offset)
+{
+	writel(enable, GPC_IPS_BASE_ADDR + offset);
+}
+
+__secure void imx_gpcv2_set_core1_power(bool pdn)
+{
+	u32 reg = pdn ? GPC_CPU_PGC_SW_PUP_REQ : GPC_CPU_PGC_SW_PDN_REQ;
+	u32 val;
+
+	imx_gpcv2_set_m_core_pgc(true, GPC_PGC_C1);
+
+	val = readl(GPC_IPS_BASE_ADDR + reg);
+	val |= BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7;
+	writel(val, GPC_IPS_BASE_ADDR + reg);
+
+	while ((readl(GPC_IPS_BASE_ADDR + reg) &
+	       BM_CPU_PGC_SW_PDN_PUP_REQ_CORE1_A7) != 0)
+		;
+
+	imx_gpcv2_set_m_core_pgc(false, GPC_PGC_C1);
+}
+
+__secure void imx_enable_cpu_ca7(int cpu, bool enable)
+{
+	u32 mask, val;
+
+	mask = 1 << (BP_SRC_A7RCR1_A7_CORE1_ENABLE + cpu - 1);
+	val = readl(SRC_BASE_ADDR + SRC_A7RCR1);
+	val = enable ? val | mask : val & ~mask;
+	writel(val, SRC_BASE_ADDR + SRC_A7RCR1);
+}
+
+__secure int imx_cpu_on(int fn, int cpu, int pc)
+{
+	writel(pc, SRC_BASE_ADDR + cpu * 8 + SRC_GPR1_MX7D);
+	imx_gpcv2_set_core1_power(true);
+	imx_enable_cpu_ca7(cpu, true);
+	return 0;
+}
+
+__secure int imx_cpu_off(int cpu)
+{
+	imx_enable_cpu_ca7(cpu, false);
+	imx_gpcv2_set_core1_power(false);
+	writel(0, SRC_BASE_ADDR + cpu * 8 + SRC_GPR1_MX7D + 4);
+	return 0;
+}
diff --git a/arch/arm/cpu/armv7/mx7/psci.S b/arch/arm/cpu/armv7/mx7/psci.S
new file mode 100644
index 0000000..34c6ab3
--- /dev/null
+++ b/arch/arm/cpu/armv7/mx7/psci.S
@@ -0,0 +1,54 @@
+#include <config.h>
+#include <linux/linkage.h>
+
+#include <asm/armv7.h>
+#include <asm/arch-armv7/generictimer.h>
+#include <asm/psci.h>
+
+	.pushsection ._secure.text, "ax"
+
+	.arch_extension sec
+
+	@ r1 = target CPU
+	@ r2 = target PC
+
+.globl	psci_arch_init
+psci_arch_init:
+	mov	r6, lr
+
+	bl	psci_get_cpu_id
+	bl	psci_get_cpu_stack_top
+	mov	sp, r0
+
+	bx	r6
+
+	@ r1 = target CPU
+	@ r2 = target PC
+
+.globl psci_cpu_on
+psci_cpu_on:
+	push	{lr}
+
+	mov	r0, r1
+	bl	psci_get_cpu_stack_top
+	str	r2, [r0]
+	dsb
+
+	ldr	r2, =psci_cpu_entry
+	bl	imx_cpu_on
+
+	pop	{pc}
+
+.globl psci_cpu_off
+psci_cpu_off:
+
+	bl	psci_cpu_off_common
+	bl	psci_get_cpu_id
+	bl	imx_cpu_off
+
+1: 	wfi
+	b 1b
+
+	.globl psci_text_end
+psci_text_end:
+	.popsection
diff --git a/arch/arm/cpu/armv7/mx7/soc.c b/arch/arm/cpu/armv7/mx7/soc.c
index 2ed05ea..dbae868 100644
--- a/arch/arm/cpu/armv7/mx7/soc.c
+++ b/arch/arm/cpu/armv7/mx7/soc.c
@@ -114,10 +114,19 @@ u32 __weak get_board_rev(void)
 }
 #endif
 
+/* enable all periherial can be accessed in nosec mode */
+static void init_csu(void)
+{
+	int i = 0;
+	for (i = 0; i < CSU_NUM_REGS; i++)
+		writel(CSU_INIT_SEC_LEVEL0, CSU_IPS_BASE_ADDR + i * 4);
+}
+
 int arch_cpu_init(void)
 {
 	init_aips();
 
+	init_csu();
 	/* Disable PDE bit of WMCR register */
 	imx_set_wdog_powerdown(false);
 
diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h
index 4dc11ee..9213374 100644
--- a/arch/arm/include/asm/arch-mx7/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx7/imx-regs.h
@@ -866,6 +866,9 @@ struct cspi_regs {
 	ECSPI3_BASE_ADDR, \
 	ECSPI4_BASE_ADDR
 
+#define CSU_INIT_SEC_LEVEL0	0x00FF00FF
+#define CSU_NUM_REGS		64
+
 struct ocotp_regs {
 	u32 ctrl;
 	u32 ctrl_set;
-- 
1.8.4

[U-Boot] [PATCH V4 3/3] imx: mx7: default enable non-secure mode

[Peng Fan]

Support PSCI and switch to non-secure mode when booting linux.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
---

Changes v4:
 Discard unused 1's when define macros.

Changes V3:
 none

Changes V2:
 default no enable CONFIG_ARMV7_VIRT

 include/configs/mx7_common.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index ea2be49..508d1d3 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -92,4 +92,15 @@
 #define CONFIG_CMD_FUSE
 #define CONFIG_MXC_OCOTP
 
+/*
+ * Default boot linux kernel in no secure mode.
+ * If want to boot kernel in secure mode, please define CONFIG_MX7_SEC
+ */
+#ifndef CONFIG_MX7_SEC
+#define CONFIG_ARMV7_NONSEC
+#define CONFIG_ARMV7_PSCI
+#define CONFIG_ARMV7_PSCI_NR_CPUS	2
+#define CONFIG_ARMV7_SECURE_BASE	0x00900000
+#endif
+
 #endif
-- 
1.8.4

[U-Boot] [PATCH V4 1/3] arm: discard relocation entries for secure text

[Peng Fan]

Hi Albert,

Are you fine with this patch?

I'd like the patch go through i.MX tree, since the other two patches
needs this patch to work.

Thanks,
Peng.

On Fri, Oct 23, 2015 at 10:13:03AM +0800, Peng Fan wrote:
>The code such as PSCI in section named secure is bundled with
>u-boot image, and when bootm, the code will be copied to their
>runtime address same to compliation/linking address -
>CONFIG_ARMV7_SECURE_BASE.
>
>When compile the PSCI code and link it into the u-boot image,
>there will be relocation entries in .rel.dyn section for PSCI.
>Actually, we do not needs these relocation entries.
>
>If still keep the relocation entries in .rel.dyn section,
>r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid
>address which may not support read/write for one SoC.
>102         /* relative fix: increase location by offset */
>103         add     r0, r0, r4
>104         ldr     r1, [r0]
>105         add     r1, r1, r4
>106         str     r1, [r0]
>
>So discard them to avoid touching the relocation entry in
>arch/arm/lib/relocate.S.
>
>Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>Cc: Tom Warren <twarren@nvidia.com>
>Cc: York Sun <yorksun@freescale.com>
>Cc: Hans De Goede <hdegoede@redhat.com>
>Cc: Ian Campbell <ijc@hellion.org.uk>
>Cc: Albert Aribaud <albert.u.boot@aribaud.net>
>Cc: Tom Rini <trini@konsulko.com>
>Cc: Jan Kiszka <jan.kiszka@siemens.com>
>Cc: Stefano Babic <sbabic@denx.de>
>---
>
>Changes v4:
> none
>
>V2 thread: http://lists.denx.de/pipermail/u-boot/2015-October/230755.html
>Changes v3:
> Move the relocation entries to the very begining and discard them.
>
>V1 thread: http://lists.denx.de/pipermail/u-boot/2015-October/229426.html
>Changes V2:
> Refine commit msg.
> Discard the relocation entry section for secure text.
>
> arch/arm/cpu/u-boot.lds | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
>diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
>index 03cd9f6..d48a905 100644
>--- a/arch/arm/cpu/u-boot.lds
>+++ b/arch/arm/cpu/u-boot.lds
>@@ -14,6 +14,23 @@ OUTPUT_ARCH(arm)
> ENTRY(_start)
> SECTIONS
> {
>+	/*
>+	 * Discard the relocation entries for secure text.
>+	 * The secure code is bundled with u-boot image, so there will
>+	 * be relocations entries for the secure code, since we use
>+	 * "-mword-relocations" to compile and "-pie" to link into the
>+	 * final image. We do not need the relocation entries for secure
>+	 * code, because secure code will not be relocated, it only needs
>+	 * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
>+	 * which is the linking and running address for secure code.
>+	 * If keep the relocation entries in .rel.dyn section,
>+	 * "relocation offset + linking address" may locates into an
>+	 * address that is reserved by SoC, then will trigger data abort.
>+	 *
>+	 * The reason that move .rel._secure at the beginning, is to
>+	 * avoid hole in the final image.
>+	 */
>+	/DISCARD/ : { *(.rel._secure*) }
> 	. = 0x00000000;
> 
> 	. = ALIGN(4);
>-- 
>1.8.4
>
>

-- 

[U-Boot] [PATCH V4 1/3] arm: discard relocation entries for secure text

[Peng Fan]

On Fri, Oct 30, 2015 at 04:23:49PM +0800, Peng Fan wrote:
>Hi Albert,
>
>Are you fine with this patch?
>
>I'd like the patch go through i.MX tree, since the other two patches
>needs this patch to work.

Ping..

Thanks,
Peng.

>
>Thanks,
>Peng.
>
>On Fri, Oct 23, 2015 at 10:13:03AM +0800, Peng Fan wrote:
>>The code such as PSCI in section named secure is bundled with
>>u-boot image, and when bootm, the code will be copied to their
>>runtime address same to compliation/linking address -
>>CONFIG_ARMV7_SECURE_BASE.
>>
>>When compile the PSCI code and link it into the u-boot image,
>>there will be relocation entries in .rel.dyn section for PSCI.
>>Actually, we do not needs these relocation entries.
>>
>>If still keep the relocation entries in .rel.dyn section,
>>r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid
>>address which may not support read/write for one SoC.
>>102         /* relative fix: increase location by offset */
>>103         add     r0, r0, r4
>>104         ldr     r1, [r0]
>>105         add     r1, r1, r4
>>106         str     r1, [r0]
>>
>>So discard them to avoid touching the relocation entry in
>>arch/arm/lib/relocate.S.
>>
>>Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>>Cc: Tom Warren <twarren@nvidia.com>
>>Cc: York Sun <yorksun@freescale.com>
>>Cc: Hans De Goede <hdegoede@redhat.com>
>>Cc: Ian Campbell <ijc@hellion.org.uk>
>>Cc: Albert Aribaud <albert.u.boot@aribaud.net>
>>Cc: Tom Rini <trini@konsulko.com>
>>Cc: Jan Kiszka <jan.kiszka@siemens.com>
>>Cc: Stefano Babic <sbabic@denx.de>
>>---
>>
>>Changes v4:
>> none
>>
>>V2 thread: http://lists.denx.de/pipermail/u-boot/2015-October/230755.html
>>Changes v3:
>> Move the relocation entries to the very begining and discard them.
>>
>>V1 thread: http://lists.denx.de/pipermail/u-boot/2015-October/229426.html
>>Changes V2:
>> Refine commit msg.
>> Discard the relocation entry section for secure text.
>>
>> arch/arm/cpu/u-boot.lds | 17 +++++++++++++++++
>> 1 file changed, 17 insertions(+)
>>
>>diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
>>index 03cd9f6..d48a905 100644
>>--- a/arch/arm/cpu/u-boot.lds
>>+++ b/arch/arm/cpu/u-boot.lds
>>@@ -14,6 +14,23 @@ OUTPUT_ARCH(arm)
>> ENTRY(_start)
>> SECTIONS
>> {
>>+	/*
>>+	 * Discard the relocation entries for secure text.
>>+	 * The secure code is bundled with u-boot image, so there will
>>+	 * be relocations entries for the secure code, since we use
>>+	 * "-mword-relocations" to compile and "-pie" to link into the
>>+	 * final image. We do not need the relocation entries for secure
>>+	 * code, because secure code will not be relocated, it only needs
>>+	 * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
>>+	 * which is the linking and running address for secure code.
>>+	 * If keep the relocation entries in .rel.dyn section,
>>+	 * "relocation offset + linking address" may locates into an
>>+	 * address that is reserved by SoC, then will trigger data abort.
>>+	 *
>>+	 * The reason that move .rel._secure at the beginning, is to
>>+	 * avoid hole in the final image.
>>+	 */
>>+	/DISCARD/ : { *(.rel._secure*) }
>> 	. = 0x00000000;
>> 
>> 	. = ALIGN(4);
>>-- 
>>1.8.4
>>
>>
>
>-- 

-- 

[U-Boot] [PATCH V4 1/3] arm: discard relocation entries for secure text

[Albert ARIBAUD]

Hello Peng,

On Fri, 23 Oct 2015 10:13:03 +0800, Peng Fan <Peng.Fan@freescale.com>
wrote:
> The code such as PSCI in section named secure is bundled with
> u-boot image, and when bootm, the code will be copied to their
> runtime address same to compliation/linking address -
> CONFIG_ARMV7_SECURE_BASE.
> 
> When compile the PSCI code and link it into the u-boot image,
> there will be relocation entries in .rel.dyn section for PSCI.
> Actually, we do not needs these relocation entries.
> 
> If still keep the relocation entries in .rel.dyn section,
> r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid
> address which may not support read/write for one SoC.
> 102         /* relative fix: increase location by offset */
> 103         add     r0, r0, r4
> 104         ldr     r1, [r0]
> 105         add     r1, r1, r4
> 106         str     r1, [r0]
> 
> So discard them to avoid touching the relocation entry in
> arch/arm/lib/relocate.S.
> 
> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
> Cc: Tom Warren <twarren@nvidia.com>
> Cc: York Sun <yorksun@freescale.com>
> Cc: Hans De Goede <hdegoede@redhat.com>
> Cc: Ian Campbell <ijc@hellion.org.uk>
> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
> Cc: Tom Rini <trini@konsulko.com>
> Cc: Jan Kiszka <jan.kiszka@siemens.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> 
> Changes v4:
>  none
> 
> V2 thread: http://lists.denx.de/pipermail/u-boot/2015-October/230755.html
> Changes v3:
>  Move the relocation entries to the very begining and discard them.
> 
> V1 thread: http://lists.denx.de/pipermail/u-boot/2015-October/229426.html
> Changes V2:
>  Refine commit msg.
>  Discard the relocation entry section for secure text.
> 
>  arch/arm/cpu/u-boot.lds | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
> index 03cd9f6..d48a905 100644
> --- a/arch/arm/cpu/u-boot.lds
> +++ b/arch/arm/cpu/u-boot.lds
> @@ -14,6 +14,23 @@ OUTPUT_ARCH(arm)
>  ENTRY(_start)
>  SECTIONS
>  {
> +	/*
> +	 * Discard the relocation entries for secure text.
> +	 * The secure code is bundled with u-boot image, so there will
> +	 * be relocations entries for the secure code, since we use
> +	 * "-mword-relocations" to compile and "-pie" to link into the
> +	 * final image. We do not need the relocation entries for secure
> +	 * code, because secure code will not be relocated, it only needs
> +	 * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
> +	 * which is the linking and running address for secure code.
> +	 * If keep the relocation entries in .rel.dyn section,
> +	 * "relocation offset + linking address" may locates into an
> +	 * address that is reserved by SoC, then will trigger data abort.
> +	 *
> +	 * The reason that move .rel._secure at the beginning, is to
> +	 * avoid hole in the final image.
> +	 */
> +	/DISCARD/ : { *(.rel._secure*) }
>  	. = 0x00000000;
>  
>  	. = ALIGN(4);
> -- 
> 1.8.4
> 
> 

Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

Amicalement,
-- 
Albert.

[U-Boot] [PATCH V4 1/3] arm: discard relocation entries for secure text

[Peng Fan]

Hi Stefano,

On Tue, Nov 10, 2015 at 02:14:10PM +0100, Albert ARIBAUD wrote:
>Hello Peng,
>
>On Fri, 23 Oct 2015 10:13:03 +0800, Peng Fan <Peng.Fan@freescale.com>
>wrote:
>> The code such as PSCI in section named secure is bundled with
>> u-boot image, and when bootm, the code will be copied to their
>> runtime address same to compliation/linking address -
>> CONFIG_ARMV7_SECURE_BASE.
>> 
>> When compile the PSCI code and link it into the u-boot image,
>> there will be relocation entries in .rel.dyn section for PSCI.
>> Actually, we do not needs these relocation entries.
>> 
>> If still keep the relocation entries in .rel.dyn section,
>> r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid
>> address which may not support read/write for one SoC.
>> 102         /* relative fix: increase location by offset */
>> 103         add     r0, r0, r4
>> 104         ldr     r1, [r0]
>> 105         add     r1, r1, r4
>> 106         str     r1, [r0]
>> 
>> So discard them to avoid touching the relocation entry in
>> arch/arm/lib/relocate.S.
>> 
>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>> Cc: Tom Warren <twarren@nvidia.com>
>> Cc: York Sun <yorksun@freescale.com>
>> Cc: Hans De Goede <hdegoede@redhat.com>
>> Cc: Ian Campbell <ijc@hellion.org.uk>
>> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
>> Cc: Tom Rini <trini@konsulko.com>
>> Cc: Jan Kiszka <jan.kiszka@siemens.com>
>> Cc: Stefano Babic <sbabic@denx.de>
>> ---
>> 
>> Changes v4:
>>  none
>> 
>> V2 thread: http://lists.denx.de/pipermail/u-boot/2015-October/230755.html
>> Changes v3:
>>  Move the relocation entries to the very begining and discard them.
>> 
>> V1 thread: http://lists.denx.de/pipermail/u-boot/2015-October/229426.html
>> Changes V2:
>>  Refine commit msg.
>>  Discard the relocation entry section for secure text.
>> 
>>  arch/arm/cpu/u-boot.lds | 17 +++++++++++++++++
>>  1 file changed, 17 insertions(+)
>> 
>> diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
>> index 03cd9f6..d48a905 100644
>> --- a/arch/arm/cpu/u-boot.lds
>> +++ b/arch/arm/cpu/u-boot.lds
>> @@ -14,6 +14,23 @@ OUTPUT_ARCH(arm)
>>  ENTRY(_start)
>>  SECTIONS
>>  {
>> +	/*
>> +	 * Discard the relocation entries for secure text.
>> +	 * The secure code is bundled with u-boot image, so there will
>> +	 * be relocations entries for the secure code, since we use
>> +	 * "-mword-relocations" to compile and "-pie" to link into the
>> +	 * final image. We do not need the relocation entries for secure
>> +	 * code, because secure code will not be relocated, it only needs
>> +	 * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
>> +	 * which is the linking and running address for secure code.
>> +	 * If keep the relocation entries in .rel.dyn section,
>> +	 * "relocation offset + linking address" may locates into an
>> +	 * address that is reserved by SoC, then will trigger data abort.
>> +	 *
>> +	 * The reason that move .rel._secure at the beginning, is to
>> +	 * avoid hole in the final image.
>> +	 */
>> +	/DISCARD/ : { *(.rel._secure*) }
>>  	. = 0x00000000;
>>  
>>  	. = ALIGN(4);
>> -- 
>> 1.8.4
>> 
>> 
>
>Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
>

Can you please take a look at the patch set and merge?

Thanks,
Peng.

>Amicalement,
>-- 
>Albert.

-- 

[U-Boot] [PATCH V4 1/3] arm: discard relocation entries for secure text

[Stefano Babic]

On 11/11/2015 02:14, Peng Fan wrote:
> Hi Stefano,
> 
> On Tue, Nov 10, 2015 at 02:14:10PM +0100, Albert ARIBAUD wrote:
>> Hello Peng,
>>
>> On Fri, 23 Oct 2015 10:13:03 +0800, Peng Fan <Peng.Fan@freescale.com>
>> wrote:
>>> The code such as PSCI in section named secure is bundled with
>>> u-boot image, and when bootm, the code will be copied to their
>>> runtime address same to compliation/linking address -
>>> CONFIG_ARMV7_SECURE_BASE.
>>>
>>> When compile the PSCI code and link it into the u-boot image,
>>> there will be relocation entries in .rel.dyn section for PSCI.
>>> Actually, we do not needs these relocation entries.
>>>
>>> If still keep the relocation entries in .rel.dyn section,
>>> r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid
>>> address which may not support read/write for one SoC.
>>> 102         /* relative fix: increase location by offset */
>>> 103         add     r0, r0, r4
>>> 104         ldr     r1, [r0]
>>> 105         add     r1, r1, r4
>>> 106         str     r1, [r0]
>>>
>>> So discard them to avoid touching the relocation entry in
>>> arch/arm/lib/relocate.S.
>>>
>>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>>> Cc: Tom Warren <twarren@nvidia.com>
>>> Cc: York Sun <yorksun@freescale.com>
>>> Cc: Hans De Goede <hdegoede@redhat.com>
>>> Cc: Ian Campbell <ijc@hellion.org.uk>
>>> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
>>> Cc: Tom Rini <trini@konsulko.com>
>>> Cc: Jan Kiszka <jan.kiszka@siemens.com>
>>> Cc: Stefano Babic <sbabic@denx.de>
>>> ---
>>>
>>> Changes v4:
>>>  none
>>>
>>> V2 thread: http://lists.denx.de/pipermail/u-boot/2015-October/230755.html
>>> Changes v3:
>>>  Move the relocation entries to the very begining and discard them.
>>>
>>> V1 thread: http://lists.denx.de/pipermail/u-boot/2015-October/229426.html
>>> Changes V2:
>>>  Refine commit msg.
>>>  Discard the relocation entry section for secure text.
>>>
>>>  arch/arm/cpu/u-boot.lds | 17 +++++++++++++++++
>>>  1 file changed, 17 insertions(+)
>>>
>>> diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
>>> index 03cd9f6..d48a905 100644
>>> --- a/arch/arm/cpu/u-boot.lds
>>> +++ b/arch/arm/cpu/u-boot.lds
>>> @@ -14,6 +14,23 @@ OUTPUT_ARCH(arm)
>>>  ENTRY(_start)
>>>  SECTIONS
>>>  {
>>> +	/*
>>> +	 * Discard the relocation entries for secure text.
>>> +	 * The secure code is bundled with u-boot image, so there will
>>> +	 * be relocations entries for the secure code, since we use
>>> +	 * "-mword-relocations" to compile and "-pie" to link into the
>>> +	 * final image. We do not need the relocation entries for secure
>>> +	 * code, because secure code will not be relocated, it only needs
>>> +	 * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
>>> +	 * which is the linking and running address for secure code.
>>> +	 * If keep the relocation entries in .rel.dyn section,
>>> +	 * "relocation offset + linking address" may locates into an
>>> +	 * address that is reserved by SoC, then will trigger data abort.
>>> +	 *
>>> +	 * The reason that move .rel._secure at the beginning, is to
>>> +	 * avoid hole in the final image.
>>> +	 */
>>> +	/DISCARD/ : { *(.rel._secure*) }
>>>  	. = 0x00000000;
>>>  
>>>  	. = ALIGN(4);
>>> -- 
>>> 1.8.4
>>>
>>>
>>
>> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
>>
> 
> Can you please take a look at the patch set and merge?

I'll do

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH V4 1/3] arm: discard relocation entries for secure text

[Stefano Babic]

On 11/11/2015 18:05, Stefano Babic wrote:
> On 11/11/2015 02:14, Peng Fan wrote:
>> Hi Stefano,
>>
>> On Tue, Nov 10, 2015 at 02:14:10PM +0100, Albert ARIBAUD wrote:
>>> Hello Peng,
>>>
>>> On Fri, 23 Oct 2015 10:13:03 +0800, Peng Fan <Peng.Fan@freescale.com>
>>> wrote:
>>>> The code such as PSCI in section named secure is bundled with
>>>> u-boot image, and when bootm, the code will be copied to their
>>>> runtime address same to compliation/linking address -
>>>> CONFIG_ARMV7_SECURE_BASE.
>>>>
>>>> When compile the PSCI code and link it into the u-boot image,
>>>> there will be relocation entries in .rel.dyn section for PSCI.
>>>> Actually, we do not needs these relocation entries.
>>>>
>>>> If still keep the relocation entries in .rel.dyn section,
>>>> r0 at line 103 and 106 in arch/arm/lib/relocate.S may be an invalid
>>>> address which may not support read/write for one SoC.
>>>> 102         /* relative fix: increase location by offset */
>>>> 103         add     r0, r0, r4
>>>> 104         ldr     r1, [r0]
>>>> 105         add     r1, r1, r4
>>>> 106         str     r1, [r0]
>>>>
>>>> So discard them to avoid touching the relocation entry in
>>>> arch/arm/lib/relocate.S.
>>>>
>>>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>>>> Cc: Tom Warren <twarren@nvidia.com>
>>>> Cc: York Sun <yorksun@freescale.com>
>>>> Cc: Hans De Goede <hdegoede@redhat.com>
>>>> Cc: Ian Campbell <ijc@hellion.org.uk>
>>>> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
>>>> Cc: Tom Rini <trini@konsulko.com>
>>>> Cc: Jan Kiszka <jan.kiszka@siemens.com>
>>>> Cc: Stefano Babic <sbabic@denx.de>
>>>> ---
>>>>
>>>> Changes v4:
>>>>  none
>>>>
>>>> V2 thread: http://lists.denx.de/pipermail/u-boot/2015-October/230755.html
>>>> Changes v3:
>>>>  Move the relocation entries to the very begining and discard them.
>>>>
>>>> V1 thread: http://lists.denx.de/pipermail/u-boot/2015-October/229426.html
>>>> Changes V2:
>>>>  Refine commit msg.
>>>>  Discard the relocation entry section for secure text.
>>>>
>>>>  arch/arm/cpu/u-boot.lds | 17 +++++++++++++++++
>>>>  1 file changed, 17 insertions(+)
>>>>
>>>> diff --git a/arch/arm/cpu/u-boot.lds b/arch/arm/cpu/u-boot.lds
>>>> index 03cd9f6..d48a905 100644
>>>> --- a/arch/arm/cpu/u-boot.lds
>>>> +++ b/arch/arm/cpu/u-boot.lds
>>>> @@ -14,6 +14,23 @@ OUTPUT_ARCH(arm)
>>>>  ENTRY(_start)
>>>>  SECTIONS
>>>>  {
>>>> +	/*
>>>> +	 * Discard the relocation entries for secure text.
>>>> +	 * The secure code is bundled with u-boot image, so there will
>>>> +	 * be relocations entries for the secure code, since we use
>>>> +	 * "-mword-relocations" to compile and "-pie" to link into the
>>>> +	 * final image. We do not need the relocation entries for secure
>>>> +	 * code, because secure code will not be relocated, it only needs
>>>> +	 * to be copied from loading address to CONFIG_ARMV7_SECURE_BASE,
>>>> +	 * which is the linking and running address for secure code.
>>>> +	 * If keep the relocation entries in .rel.dyn section,
>>>> +	 * "relocation offset + linking address" may locates into an
>>>> +	 * address that is reserved by SoC, then will trigger data abort.
>>>> +	 *
>>>> +	 * The reason that move .rel._secure at the beginning, is to
>>>> +	 * avoid hole in the final image.
>>>> +	 */
>>>> +	/DISCARD/ : { *(.rel._secure*) }
>>>>  	. = 0x00000000;
>>>>  
>>>>  	. = ALIGN(4);
>>>> -- 
>>>> 1.8.4
>>>>
>>>>
>>>
>>> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
>>>
>>
>> Can you please take a look at the patch set and merge?
> 

Applied (whole series) to u-boot-imx, thanks !

Best regards,
Stefano Babic


-- 
=====================================================================
DENX Software Engineering GmbH,      Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================

[U-Boot] [PATCH V4 2/3] mx7: psci: add basic psci support

[Gary Bisson]

Hi all,

Sorry to revive an old thread but I have some questions about thit patch.

On Fri, Oct 23, 2015 at 10:13:04AM +0800, Peng Fan wrote:
> 1. add basic psci support for imx7 chip.
> 2. support cpu_on and cpu_off.
> 3. switch to non-secure mode when boot linux kernel.
> 4. set csu allow accessing all peripherial register in non-secure mode.
> 
> Signed-off-by: Frank Li <Frank.Li@freescale.com>
> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Cc: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> [snip]
> diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h
> index 4dc11ee..9213374 100644
> --- a/arch/arm/include/asm/arch-mx7/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h
> @@ -866,6 +866,9 @@ struct cspi_regs {
>  	ECSPI3_BASE_ADDR, \
>  	ECSPI4_BASE_ADDR
>  
> +#define CSU_INIT_SEC_LEVEL0	0x00FF00FF
> +#define CSU_NUM_REGS		64

In the security documentation (revA) it is said that there are 40 CSL,
why is it 64 here?

Also, although this seems to work, later on when the kernel boots I get
the following CAAM errors:
caam 30900000.caam: failed to acquire DECO 0
...
caam 30900000.caam: failed to acquire DECO 0
caam 30900000.caam: failed to instantiate RNG
caam: probe of 30900000.caam failed with error -11

If I revert this patch and therefore leave the CSU to its default state
at bootup the above CAAM issue disappears, do you have any idea why?

As a FYI, I am using U-Boot v2016.03 + a few patches that adds support
for our i.MX7 Nitrogen7 board. You can find the repo here:
https://github.com/boundarydevices/u-boot-imx6/tree/boundary-v2016.03

Also, if I base U-Boot on top of NXP repo it works too since this csu/psci
support isn't there:
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/?id=rel_imx_3.14.52_1.1.0_ga

Regards,
Gary

[U-Boot] [PATCH V4 2/3] mx7: psci: add basic psci support

[Peng Fan]

Hi Gary,

On Thu, Mar 31, 2016 at 01:17:07PM +0200, Gary Bisson wrote:
>Hi all,
>
>Sorry to revive an old thread but I have some questions about thit patch.
>
>On Fri, Oct 23, 2015 at 10:13:04AM +0800, Peng Fan wrote:
>> 1. add basic psci support for imx7 chip.
>> 2. support cpu_on and cpu_off.
>> 3. switch to non-secure mode when boot linux kernel.
>> 4. set csu allow accessing all peripherial register in non-secure mode.
>> 
>> Signed-off-by: Frank Li <Frank.Li@freescale.com>
>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>> Cc: Stefano Babic <sbabic@denx.de>
>> Cc: Fabio Estevam <fabio.estevam@freescale.com>
>> ---
>> [snip]
>> diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h
>> index 4dc11ee..9213374 100644
>> --- a/arch/arm/include/asm/arch-mx7/imx-regs.h
>> +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h
>> @@ -866,6 +866,9 @@ struct cspi_regs {
>>  	ECSPI3_BASE_ADDR, \
>>  	ECSPI4_BASE_ADDR
>>  
>> +#define CSU_INIT_SEC_LEVEL0	0x00FF00FF
>> +#define CSU_NUM_REGS		64
>
>In the security documentation (revA) it is said that there are 40 CSL,
>why is it 64 here?
>
>Also, although this seems to work, later on when the kernel boots I get
>the following CAAM errors:
>caam 30900000.caam: failed to acquire DECO 0
>...
>caam 30900000.caam: failed to acquire DECO 0
>caam 30900000.caam: failed to instantiate RNG
>caam: probe of 30900000.caam failed with error -11

This patch will let SoC switch to non sec mode. I have little knowledge
of CAAM, I guess it works in sec mode. So when kernel boots up, it will
complains a lot...

>
>If I revert this patch and therefore leave the CSU to its default state
>at bootup the above CAAM issue disappears, do you have any idea why?


Revert this patch, then all code runs in sec mode.

>
>As a FYI, I am using U-Boot v2016.03 + a few patches that adds support
>for our i.MX7 Nitrogen7 board. You can find the repo here:
>https://github.com/boundarydevices/u-boot-imx6/tree/boundary-v2016.03
>
>Also, if I base U-Boot on top of NXP repo it works too since this csu/psci
>support isn't there:
>http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/?id=rel_imx_3.14.52_1.1.0_ga

Yeah. NXP code not switch to non sec mode.

You can revert this patch in your vendor tree. I am not sure whether you
have tested linux upstream tree, or you use caam code from NXP vendor
tree. If you use NXP vendor tree, and use uboot upstream code, sure
caam will complain errros. We would like to use PSCI and work in
non-sec mode, but still some works need to be done.

Regards,
Peng.

>
>Regards,
>Gary
>_______________________________________________
>U-Boot mailing list
>U-Boot at lists.denx.de
>http://lists.denx.de/mailman/listinfo/u-boot

[U-Boot] [PATCH V4 2/3] mx7: psci: add basic psci support

[Gary Bisson]

Hi Peng,

On Thu, Mar 31, 2016 at 3:33 PM, Peng Fan <van.freenix@gmail.com> wrote:
> Hi Gary,
>
> On Thu, Mar 31, 2016 at 01:17:07PM +0200, Gary Bisson wrote:
>>Hi all,
>>
>>Sorry to revive an old thread but I have some questions about thit patch.
>>
>>On Fri, Oct 23, 2015 at 10:13:04AM +0800, Peng Fan wrote:
>>> 1. add basic psci support for imx7 chip.
>>> 2. support cpu_on and cpu_off.
>>> 3. switch to non-secure mode when boot linux kernel.
>>> 4. set csu allow accessing all peripherial register in non-secure mode.
>>>
>>> Signed-off-by: Frank Li <Frank.Li@freescale.com>
>>> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
>>> Cc: Stefano Babic <sbabic@denx.de>
>>> Cc: Fabio Estevam <fabio.estevam@freescale.com>
>>> ---
>>> [snip]
>>> diff --git a/arch/arm/include/asm/arch-mx7/imx-regs.h b/arch/arm/include/asm/arch-mx7/imx-regs.h
>>> index 4dc11ee..9213374 100644
>>> --- a/arch/arm/include/asm/arch-mx7/imx-regs.h
>>> +++ b/arch/arm/include/asm/arch-mx7/imx-regs.h
>>> @@ -866,6 +866,9 @@ struct cspi_regs {
>>>      ECSPI3_BASE_ADDR, \
>>>      ECSPI4_BASE_ADDR
>>>
>>> +#define CSU_INIT_SEC_LEVEL0 0x00FF00FF
>>> +#define CSU_NUM_REGS                64
>>
>>In the security documentation (revA) it is said that there are 40 CSL,
>>why is it 64 here?
>>
>>Also, although this seems to work, later on when the kernel boots I get
>>the following CAAM errors:
>>caam 30900000.caam: failed to acquire DECO 0
>>...
>>caam 30900000.caam: failed to acquire DECO 0
>>caam 30900000.caam: failed to instantiate RNG
>>caam: probe of 30900000.caam failed with error -11
>
> This patch will let SoC switch to non sec mode. I have little knowledge
> of CAAM, I guess it works in sec mode. So when kernel boots up, it will
> complains a lot...

Seems like a safe assumption to say CAAM requires to be run in secure mode.

>>If I revert this patch and therefore leave the CSU to its default state
>>at bootup the above CAAM issue disappears, do you have any idea why?
>
>
> Revert this patch, then all code runs in sec mode.
>
>>
>>As a FYI, I am using U-Boot v2016.03 + a few patches that adds support
>>for our i.MX7 Nitrogen7 board. You can find the repo here:
>>https://github.com/boundarydevices/u-boot-imx6/tree/boundary-v2016.03
>>
>>Also, if I base U-Boot on top of NXP repo it works too since this csu/psci
>>support isn't there:
>>http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/?id=rel_imx_3.14.52_1.1.0_ga
>
> Yeah. NXP code not switch to non sec mode.
>
> You can revert this patch in your vendor tree. I am not sure whether you
> have tested linux upstream tree, or you use caam code from NXP vendor
> tree. If you use NXP vendor tree, and use uboot upstream code, sure
> caam will complain errros. We would like to use PSCI and work in
> non-sec mode, but still some works need to be done.

Thanks for your feedback. We are using our own tree based on NXP
vendor one (3.14.52_1.1.0_ga).

We usually use upstream U-Boot with this kernel tree. I guess the
easiest option here is actually to add CONFIG_MX7_SEC to our board
config, this avoids to revert the patches.

Thanks,
Gary