From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] arm: socfpga: reset: FIX address of tstscratch register
Date: Thu, 12 Nov 2015 19:12:02 +0100 [thread overview]
Message-ID: <201511121912.02590.marex@denx.de> (raw)
In-Reply-To: <1447348990-2948-1-git-send-email-ilu@linutronix.de>
On Thursday, November 12, 2015 at 06:23:10 PM, Philipp Rosenberger wrote:
> The Cyclone V Hard Processor System Technical Reference Manual in the
> chapter about the Reset Manager Module Address Map stats that the offset
> of the tstscratch register ist 0x54 not 0x24.
>
> Cyclone V Hard Processor System Technical Reference Manual cv_5v4
> 2015.11.02 page 3-17 Reset Manager Module Address Map
>
> Signed-off-by: Philipp Rosenberger <ilu@linutronix.de>
Acked-by: Marek Vasut <marex@denx.de>
Thanks for spotting this!
> ---
> arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h
> b/arch/arm/mach-socfpga/include/mach/reset_manager.h index
> 8e59578..6eb6011 100644
> --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
> @@ -25,6 +25,7 @@ struct socfpga_reset_manager {
> u32 per2_mod_reset;
> u32 brg_mod_reset;
> u32 misc_mod_reset;
> + u32 padding2[12];
> u32 tstscratch;
> };
Best regards,
Marek Vasut
next prev parent reply other threads:[~2015-11-12 18:12 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-12 17:23 [U-Boot] [PATCH] arm: socfpga: reset: FIX address of tstscratch register Philipp Rosenberger
2015-11-12 18:12 ` Marek Vasut [this message]
2015-11-12 21:58 ` Marek Vasut
2015-11-13 6:11 ` Stefan Roese
2015-11-13 7:13 ` Marek Vasut
2015-11-13 8:02 ` Philipp Rosenberger
2015-11-13 8:04 ` Marek Vasut
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