From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Thu, 12 Nov 2015 19:12:02 +0100 Subject: [U-Boot] [PATCH] arm: socfpga: reset: FIX address of tstscratch register In-Reply-To: <1447348990-2948-1-git-send-email-ilu@linutronix.de> References: <1447348990-2948-1-git-send-email-ilu@linutronix.de> Message-ID: <201511121912.02590.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Thursday, November 12, 2015 at 06:23:10 PM, Philipp Rosenberger wrote: > The Cyclone V Hard Processor System Technical Reference Manual in the > chapter about the Reset Manager Module Address Map stats that the offset > of the tstscratch register ist 0x54 not 0x24. > > Cyclone V Hard Processor System Technical Reference Manual cv_5v4 > 2015.11.02 page 3-17 Reset Manager Module Address Map > > Signed-off-by: Philipp Rosenberger Acked-by: Marek Vasut Thanks for spotting this! > --- > arch/arm/mach-socfpga/include/mach/reset_manager.h | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h > b/arch/arm/mach-socfpga/include/mach/reset_manager.h index > 8e59578..6eb6011 100644 > --- a/arch/arm/mach-socfpga/include/mach/reset_manager.h > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h > @@ -25,6 +25,7 @@ struct socfpga_reset_manager { > u32 per2_mod_reset; > u32 brg_mod_reset; > u32 misc_mod_reset; > + u32 padding2[12]; > u32 tstscratch; > }; Best regards, Marek Vasut