From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marek Vasut Date: Mon, 23 Nov 2015 09:32:55 +0100 Subject: [U-Boot] [PATCH] arm: socfpga: Repair SoCrates board In-Reply-To: <5652B944.7060103@denx.de> References: <1448036253-9692-1-git-send-email-marex@denx.de> <201511211340.54989.marex@denx.de> <5652B944.7060103@denx.de> Message-ID: <201511230932.56052.marex@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Monday, November 23, 2015 at 07:59:16 AM, Stefan Roese wrote: > Hi Marek, Hi! > On 21.11.2015 13:40, Marek Vasut wrote: > >>> +/* > >>> + * PHY configuration > >>> + */ > >>> +#ifdef CONFIG_PHY_MICREL_KSZ9021 > >>> +int board_phy_config(struct phy_device *phydev) > >>> +{ > >>> + int ret; > >>> + /* > >>> + * These skew settings for the KSZ9021 ethernet phy is required for > >>> ethernet + * to work reliably on most flavors of cyclone5 boards. > >>> + */ > >>> + ret = ksz9021_phy_extended_write(phydev, > >>> + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, > >>> + 0x0); > >>> + if (ret) > >>> + return ret; > >>> + > >>> + ret = ksz9021_phy_extended_write(phydev, > >>> + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, > >>> + 0x0); > >>> + if (ret) > >>> + return ret; > >>> + > >>> + ret = ksz9021_phy_extended_write(phydev, > >>> + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, > >>> + 0xf0f0); > >>> + if (ret) > >>> + return ret; > >>> + > >>> + if (phydev->drv->config) > >>> + return phydev->drv->config(phydev); > >>> + > >>> + return 0; > >>> +} > >>> +#endif > > > > Hi! > > > >> v2 of the SoCrates comes with a different PHY, IIRC. So we might > >> want to add some checking on the PHY model here at some time. > > > > I don't have a socratesV2 and U-Boot does not support it either. Please > > either mail me a socratesV2 or send a subsequent patch to add support > > for socratesV2, I am open to either method. > > I'll send a follow-up patch for this. Thanks! Best regards, Marek Vasut